SoC Design Verification Engineer
for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule). They said do NOT repeat the job title as a heading. They said include a section ONLY when posting has real, specific content for it. So we need to parse the posting.
The posting includes:
- About Us (company description)
- Why Join InspireSemi? (benefits? maybe "Benefits" section)
- The Opportunity (role description)
- What You'll Do (Responsibilities)
- What You Bring (Requirements/Qualifications/Skills)
- Bonus Points (maybe Skills)
- PI287142820 (Job ID) - drop.
We need to map to headings: About the role? Actually they gave examples: About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. We can choose appropriate headings based on content.
We have "About Us" which is company description, not exactly "About the role". Could we use "About the role"? The instruction: use for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule). It says e.g., not limited to those. So we can use headings that match content: maybe "About InspireSemi" or "Why Join InspireSemi?" but they said use those examples. Safer to use the given examples: About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. But we need to include sections only when posting has real content.
We have content for:
- About the role: maybe the "The Opportunity" paragraph describing role. Could be "About the role".
- Responsibilities: "What You'll Do".
- Requirements/Qualifications/Skills: "What You Bring" and "Bonus Points". Could split into Requirements (education, experience) and Skills (technical). Or combine.
- Benefits: "Why Join InspireSemi?" includes "Rewarding Compensation: We offer competitive salaries, benefits, and equity. Flexibility: Benefit from a hybrid work environment...". That's benefits.
- Pay: Not explicitly stated beyond "competitive salaries". Not specific numbers, so we should NOT create Pay section because it's not specific (just "competitive salaries" is vague). The rule: never emit a heading followed by filler/placeholder text (e.g., "commensurate with experience", "not specified", "N/A", "varies", "TBD") and never create Pay/Schedule/Benefits sections unless the posting actually states them. For Benefits we have specific statements: competitive salaries, benefits, equity, hybrid work environment, fully remote for exceptional candidates, Grow With Us (development). Those are specific enough? They are somewhat generic but still mention benefits. The rule says we can create Benefits section if posting actually states them. It does state benefits: "Rewarding Compensation: We offer competitive salaries, benefits, and equity." That's a statement. So we can include Benefits.
- Pay: Not specific numbers, so we should not include Pay.
- Schedule: Not mentioned besides hybrid work environment; not explicit schedule like full-time, etc. Could be considered schedule? The rule: never create Schedule section unless posting actually states them. It mentions hybrid work environment, but not schedule details like "full-time", "40 hrs/week". Probably not enough to create Schedule. So omit.
Thus sections: About the role, Responsibilities, Requirements, Skills, Benefits. Possibly Qualifications separate? Could combine Requirements and Qualifications. But we can have Requirements (education, experience) and Skills (technical). Or we could have Requirements (education+experience) and Qualifications (skills). Let's decide.
We have "What You Bring" includes education, years experience, proficiency, understanding, experience with functional coverage, scripting, knowledge of bus protocols, version control, debugging skills. That's both requirements and skills. Bonus Points includes formal verification, emulation, Cadence EDA tools.
We could make:
- Requirements: education + years experience.
- Skills: technical proficiencies (SystemVerilog, UVM, etc.) + scripting + bus protocols + version control + debugging.
- Bonus Points could be under Skills as "Preferred" but we could add a separate "Preferred Qualifications" but not in list. Since they didn't give that heading, we could just include under Skills.
Simplify: Have sections: About the role, Responsibilities, Requirements, Skills, Benefits.
Now we need to output HTML fragment with headings and - for lists,
for prose.
We must preserve ALL substantive information; do not invent or summarize away detail. So we need to include all details from the posting, but we can format them as lists or paragraphs.
We must remove boilerplate: cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. There's none besides maybe the PI number which we drop.
We need to ensure we don't repeat job title as heading.
Let's extract content:
About Us: "At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all tightly integrated with a high-performance interconnect. We're driven by a mission to make high-performance computing more accessible and energy-efficient, with a developer-friendly programming model. Ready to make a real impact? Join our passionate team!"
Why Join InspireSemi?: "Make an Impact: Your work will directly contribute to building a high-performance compute accelerator for scientific, AI, and other applications. Rewarding Compensation: We offer competitive salaries, benefits, and equity. Flexibility: Benefit from a hybrid work environment in our Austin offices, with exceptional candidates considered for fully remote work. Grow With Us: Contribute to the development and improvement of verification methodologies, tools, and automation scripts."
The Opportunity: "We are looking for a SoC Design Verification Engineer to support the complete verification of our innovative System-on-Chip (SoC). This critical role encompasses our RISC-V core, network, and 3rd-party peripheral IP integrations. You will be responsible for developing comprehensive verification plans, building testbenches, and ensuring the highest level of design quality and functional correctness before tape-out."
What You'll Do: list of duties:
- Develop and execute verification plans for complex SoC digital designs.
- Create and maintain UVM/SystemVerilog based testbenches and environments.
- Write, debug, and execute constrained-random and directed test cases.
- Implement RISC-V ISA compliance tests.
- Perform functional coverage analysis and close coverage gaps.
- Perform regression runs, analyze failures, and drive bug closure.
- Connect simulations to real user interfaces, stimulus generators, and checkers.
- Collaborate closely with RTL design engineers, architects, and software teams.
- Contribute to the development and improvement of verification methodologies and automation scripts.
- Perform preliminary debug of discovered issues.
What You Bring: list:
- A Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field).
- 5+ years of hands-on experience in ASIC/SoC design verification.
- Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium).
- Solid understanding of digital design fundamentals, RTL design, and synthesis flow.
- Experience with functional coverage, assertions, and scoreboarding.
- Strong scripting and programming skills (Python, Perl, TCL, C/C++).
- Knowledge of common bus protocols (AXI, AHB, PCIe, DDR4/5, etc.).
- Working knowledge of version control and continuous integration tools (e.g., Git, Jenkins, Jira, and Confluence).
- Solid debugging skills, analytical thinking, and attention to detail.
Bonus Points:
- Experience with Formal verification (Conformal LEC).
- Hands-on experience with emulation systems (Zebu, Palladium) or FPGA prototypes.
- Experience with Cadence EDA tools.
Now we need to map to sections.
About the role: Could combine About Us and Why Join InspireSemi? and The Opportunity? Actually About the role likely refers to description of role and company. We could put company description under About the role? But they said About the role heading examples. We could use About the role to include company mission and role overview. Let's decide:
Section About the role: include company description (At InspireSemi...) and The Opportunity paragraph (role overview). Could also include Why Join InspireSemi? but that is more benefits. We'll keep Benefits separate.
Thus About the role: combine the two paragraphs: At InspireSemi... and We are looking for a SoC Design Verification Engineer...
We must not repeat job title as heading; we are not.
Now Responsibilities: list of What You'll Do.
Requirements: education + years experience? Could also include "Solid understanding of digital design fundamentals" etc. But that's more skill. Let's separate:
Requirements: education + years experience.
Skills: technical proficiencies (SystemVerilog, UVM, simulation tools, functional coverage, assertions, scoreboarding, scripting, bus protocols, version control, debugging, analytical thinking). Also Bonus Points could be under Skills as "Preferred" but we can just add them as part of Skills list.
Benefits: from Why Join InspireSemi?: Make an Impact, Rewarding Compensation, Flexibility, Grow With Us.
We need to preserve all substantive information. So we need to include each bullet point exactly as given, maybe rephrase? We must not invent or summarize away detail. So we need to keep the exact phrasing? The instruction: "Preserve ALL substantive information; do NOT invent or summarize away detail." Means we should not omit details, but we can reformat. Likely we can keep the same sentences but maybe break into list items.
We'll output HTML:
About the role
At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all tightly integrated with a high-performance interconnect. We're driven by a mission to make high-performance computing more accessible and energy-efficient, with a developer-friendly programming model. Ready to make a real impact? Join our passionate team!
We are looking for a SoC Design Verification Engineer to support the complete verification of our innovative System-on-Chip (SoC). This critical role encompasses our RISC-V core, network, and 3rd-party peripheral IP integrations. You will be responsible for developing comprehensive verification plans, building testbenches, and ensuring the highest level of design quality and functional correctness before tape-out.
Responsibilities
- Develop and execute verification plans for complex SoC digital designs.
- Create and maintain UVM/SystemVerilog based testbenches and environments.
- Write, debug, and execute constrained-random and directed test cases.
- Implement RISC-V ISA compliance tests.
- Perform functional coverage analysis and close coverage gaps.
- Perform regression runs, analyze failures, and drive bug closure.
- Connect simulations to real user interfaces, stimulus generators, and checkers.
- Collaborate closely with RTL design engineers, architects, and software teams.
- Contribute to the development and improvement of verification methodologies and automation scripts.
- Perform preliminary debug of discovered issues.
Requirements
- A Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field).
- 5+ years of hands-on experience in ASIC/SoC design verification.
Skills
- Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium).
- Solid understanding of digital design fundamentals
headings and - for lists,
for prose.
We must preserve ALL substantive information; do not invent or summarize away detail. So we need to include all details from the posting, but we can format them as lists or paragraphs.
We must remove boilerplate: cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. There's none besides maybe the PI number which we drop.
We need to ensure we don't repeat job title as heading.
Let's extract content:
About Us: "At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all tightly integrated with a high-performance interconnect. We're driven by a mission to make high-performance computing more accessible and energy-efficient, with a developer-friendly programming model. Ready to make a real impact? Join our passionate team!"
Why Join InspireSemi?: "Make an Impact: Your work will directly contribute to building a high-performance compute accelerator for scientific, AI, and other applications. Rewarding Compensation: We offer competitive salaries, benefits, and equity. Flexibility: Benefit from a hybrid work environment in our Austin offices, with exceptional candidates considered for fully remote work. Grow With Us: Contribute to the development and improvement of verification methodologies, tools, and automation scripts."
The Opportunity: "We are looking for a SoC Design Verification Engineer to support the complete verification of our innovative System-on-Chip (SoC). This critical role encompasses our RISC-V core, network, and 3rd-party peripheral IP integrations. You will be responsible for developing comprehensive verification plans, building testbenches, and ensuring the highest level of design quality and functional correctness before tape-out."
What You'll Do: list of duties:
- Develop and execute verification plans for complex SoC digital designs.
- Create and maintain UVM/SystemVerilog based testbenches and environments.
- Write, debug, and execute constrained-random and directed test cases.
- Implement RISC-V ISA compliance tests.
- Perform functional coverage analysis and close coverage gaps.
- Perform regression runs, analyze failures, and drive bug closure.
- Connect simulations to real user interfaces, stimulus generators, and checkers.
- Collaborate closely with RTL design engineers, architects, and software teams.
- Contribute to the development and improvement of verification methodologies and automation scripts.
- Perform preliminary debug of discovered issues.
What You Bring: list:
- A Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field).
- 5+ years of hands-on experience in ASIC/SoC design verification.
- Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium).
- Solid understanding of digital design fundamentals, RTL design, and synthesis flow.
- Experience with functional coverage, assertions, and scoreboarding.
- Strong scripting and programming skills (Python, Perl, TCL, C/C++).
- Knowledge of common bus protocols (AXI, AHB, PCIe, DDR4/5, etc.).
- Working knowledge of version control and continuous integration tools (e.g., Git, Jenkins, Jira, and Confluence).
- Solid debugging skills, analytical thinking, and attention to detail.
Bonus Points:
- Experience with Formal verification (Conformal LEC).
- Hands-on experience with emulation systems (Zebu, Palladium) or FPGA prototypes.
- Experience with Cadence EDA tools.
Now we need to map to sections.
About the role: Could combine About Us and Why Join InspireSemi? and The Opportunity? Actually About the role likely refers to description of role and company. We could put company description under About the role? But they said About the role heading examples. We could use About the role to include company mission and role overview. Let's decide:
Section About the role: include company description (At InspireSemi...) and The Opportunity paragraph (role overview). Could also include Why Join InspireSemi? but that is more benefits. We'll keep Benefits separate.
Thus About the role: combine the two paragraphs: At InspireSemi... and We are looking for a SoC Design Verification Engineer...
We must not repeat job title as heading; we are not.
Now Responsibilities: list of What You'll Do.
Requirements: education + years experience? Could also include "Solid understanding of digital design fundamentals" etc. But that's more skill. Let's separate:
Requirements: education + years experience.
Skills: technical proficiencies (SystemVerilog, UVM, simulation tools, functional coverage, assertions, scoreboarding, scripting, bus protocols, version control, debugging, analytical thinking). Also Bonus Points could be under Skills as "Preferred" but we can just add them as part of Skills list.
Benefits: from Why Join InspireSemi?: Make an Impact, Rewarding Compensation, Flexibility, Grow With Us.
We need to preserve all substantive information. So we need to include each bullet point exactly as given, maybe rephrase? We must not invent or summarize away detail. So we need to keep the exact phrasing? The instruction: "Preserve ALL substantive information; do NOT invent or summarize away detail." Means we should not omit details, but we can reformat. Likely we can keep the same sentences but maybe break into list items.
We'll output HTML:
About the role
At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all tightly integrated with a high-performance interconnect. We're driven by a mission to make high-performance computing more accessible and energy-efficient, with a developer-friendly programming model. Ready to make a real impact? Join our passionate team!
We are looking for a SoC Design Verification Engineer to support the complete verification of our innovative System-on-Chip (SoC). This critical role encompasses our RISC-V core, network, and 3rd-party peripheral IP integrations. You will be responsible for developing comprehensive verification plans, building testbenches, and ensuring the highest level of design quality and functional correctness before tape-out.
Responsibilities
- Develop and execute verification plans for complex SoC digital designs.
- Create and maintain UVM/SystemVerilog based testbenches and environments.
- Write, debug, and execute constrained-random and directed test cases.
- Implement RISC-V ISA compliance tests.
- Perform functional coverage analysis and close coverage gaps.
- Perform regression runs, analyze failures, and drive bug closure.
- Connect simulations to real user interfaces, stimulus generators, and checkers.
- Collaborate closely with RTL design engineers, architects, and software teams.
- Contribute to the development and improvement of verification methodologies and automation scripts.
- Perform preliminary debug of discovered issues.
Requirements
- A Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field).
- 5+ years of hands-on experience in ASIC/SoC design verification.
Skills
- Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium).
- Solid understanding of digital design fundamentals
for prose. We must preserve ALL substantive information; do not invent or summarize away detail. So we need to include all details from the posting, but we can format them as lists or paragraphs. We must remove boilerplate: cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. There's none besides maybe the PI number which we drop. We need to ensure we don't repeat job title as heading. Let's extract content: About Us: "At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all tightly integrated with a high-performance interconnect. We're driven by a mission to make high-performance computing more accessible and energy-efficient, with a developer-friendly programming model. Ready to make a real impact? Join our passionate team!" Why Join InspireSemi?: "Make an Impact: Your work will directly contribute to building a high-performance compute accelerator for scientific, AI, and other applications. Rewarding Compensation: We offer competitive salaries, benefits, and equity. Flexibility: Benefit from a hybrid work environment in our Austin offices, with exceptional candidates considered for fully remote work. Grow With Us: Contribute to the development and improvement of verification methodologies, tools, and automation scripts." The Opportunity: "We are looking for a SoC Design Verification Engineer to support the complete verification of our innovative System-on-Chip (SoC). This critical role encompasses our RISC-V core, network, and 3rd-party peripheral IP integrations. You will be responsible for developing comprehensive verification plans, building testbenches, and ensuring the highest level of design quality and functional correctness before tape-out." What You'll Do: list of duties: - Develop and execute verification plans for complex SoC digital designs. - Create and maintain UVM/SystemVerilog based testbenches and environments. - Write, debug, and execute constrained-random and directed test cases. - Implement RISC-V ISA compliance tests. - Perform functional coverage analysis and close coverage gaps. - Perform regression runs, analyze failures, and drive bug closure. - Connect simulations to real user interfaces, stimulus generators, and checkers. - Collaborate closely with RTL design engineers, architects, and software teams. - Contribute to the development and improvement of verification methodologies and automation scripts. - Perform preliminary debug of discovered issues. What You Bring: list: - A Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field). - 5+ years of hands-on experience in ASIC/SoC design verification. - Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium). - Solid understanding of digital design fundamentals, RTL design, and synthesis flow. - Experience with functional coverage, assertions, and scoreboarding. - Strong scripting and programming skills (Python, Perl, TCL, C/C++). - Knowledge of common bus protocols (AXI, AHB, PCIe, DDR4/5, etc.). - Working knowledge of version control and continuous integration tools (e.g., Git, Jenkins, Jira, and Confluence). - Solid debugging skills, analytical thinking, and attention to detail. Bonus Points: - Experience with Formal verification (Conformal LEC). - Hands-on experience with emulation systems (Zebu, Palladium) or FPGA prototypes. - Experience with Cadence EDA tools. Now we need to map to sections. About the role: Could combine About Us and Why Join InspireSemi? and The Opportunity? Actually About the role likely refers to description of role and company. We could put company description under About the role? But they said About the role heading examples. We could use About the role to include company mission and role overview. Let's decide: Section About the role: include company description (At InspireSemi...) and The Opportunity paragraph (role overview). Could also include Why Join InspireSemi? but that is more benefits. We'll keep Benefits separate. Thus About the role: combine the two paragraphs: At InspireSemi... and We are looking for a SoC Design Verification Engineer... We must not repeat job title as heading; we are not. Now Responsibilities: list of What You'll Do. Requirements: education + years experience? Could also include "Solid understanding of digital design fundamentals" etc. But that's more skill. Let's separate: Requirements: education + years experience. Skills: technical proficiencies (SystemVerilog, UVM, simulation tools, functional coverage, assertions, scoreboarding, scripting, bus protocols, version control, debugging, analytical thinking). Also Bonus Points could be under Skills as "Preferred" but we can just add them as part of Skills list. Benefits: from Why Join InspireSemi?: Make an Impact, Rewarding Compensation, Flexibility, Grow With Us. We need to preserve all substantive information. So we need to include each bullet point exactly as given, maybe rephrase? We must not invent or summarize away detail. So we need to keep the exact phrasing? The instruction: "Preserve ALL substantive information; do NOT invent or summarize away detail." Means we should not omit details, but we can reformat. Likely we can keep the same sentences but maybe break into list items. We'll output HTML:
About the role
At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all tightly integrated with a high-performance interconnect. We're driven by a mission to make high-performance computing more accessible and energy-efficient, with a developer-friendly programming model. Ready to make a real impact? Join our passionate team!
We are looking for a SoC Design Verification Engineer to support the complete verification of our innovative System-on-Chip (SoC). This critical role encompasses our RISC-V core, network, and 3rd-party peripheral IP integrations. You will be responsible for developing comprehensive verification plans, building testbenches, and ensuring the highest level of design quality and functional correctness before tape-out.
Responsibilities
- Develop and execute verification plans for complex SoC digital designs.
- Create and maintain UVM/SystemVerilog based testbenches and environments.
- Write, debug, and execute constrained-random and directed test cases.
- Implement RISC-V ISA compliance tests.
- Perform functional coverage analysis and close coverage gaps.
- Perform regression runs, analyze failures, and drive bug closure.
- Connect simulations to real user interfaces, stimulus generators, and checkers.
- Collaborate closely with RTL design engineers, architects, and software teams.
- Contribute to the development and improvement of verification methodologies and automation scripts.
- Perform preliminary debug of discovered issues.
Requirements
- A Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field).
- 5+ years of hands-on experience in ASIC/SoC design verification.
Skills
- Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium).
- Solid understanding of digital design fundamentals