Lead RF PCB Layout Engineer

About the job

Array Labs builds advanced radar systems to help humanity understand and respond to changes across the physical world. We're launching a coordinated fleet of radar satellites to create a high-resolution 3D map of the Earth - updated in real time - enabling faster, smarter decision-making for government and commercial organizations supporting disaster response, infrastructure resilience, and mission-critical geopolitical intelligence.

Responsibilities

• Own RF PCB layout from initial placement through manufacturing release in Altium Designer
• Define and implement stack-ups, controlled-impedance routing, and RF grounding, shielding, and isolation strategies
• Translate schematic intent into layouts that meet RF performance requirements, including connector launches, transitions, filtering, and protection circuitry placement
• Partner with RF design, electrical, antenna, mixed-signal, mechanical, and test engineers to develop layout constraints, run reviews, and de-risk first-pass success
• Drive DFM/DFT considerations with fabrication and assembly partners, including documentation and release artifacts

Qualifications

• B.S. in Electrical Engineering, or a related field with 8+ years of relevant experience
• Experience in PCB layout, fabrication, and release of RF and/or high-performance electronics
• Excellent teamwork and communication skills
• Learns new concepts rapidly, completely, and in a self-directed manner
• High levels of self-motivation and personal accountability
• Ability to work in a fast-paced environment under significant time constraints

Preferred Skills and Experience

• Experience designing RF and microwave PCB layouts including controlled-impedance routing, launches and transitions, grounding, shielding, and isolation
• Experience developing PCB stack-ups and layout constraints for high-frequency, high-performance electronics
• A strong intuition for layout-driven RF behavior, including coupling, return paths, leakage, spurious paths, and stability risks
• Experience working closely with RF design engineers to translate schematic intent into layouts that work on the first spin
• Experience with manufacturing release, DFM/DFT considerations, and collaborating with fabrication and assembly partners
• Experience supporting lab bring-up and RF characterization alongside design and test engineers (e.g., helping troubleshoot issues seen on VNAs, spectrum analyzers, and in system testing)
• Experience with EM and RF analysis workflows for layout validation (e.g., HFSS, CST, ADS Momentum)

Benefits

Employment decisions are made on the basis of merit, competence, and job qualifications and will not be influenced in any manner by gender, color, race, ethnicity, national origin, sexual orientation, religion, age, gender identity, veteran status, disability status, marital status, mental or physical disability or any other legally protected status.

Pay

You can anticipate competitive pay, with high flexibility between salary and equity-based compensation.

Schedule

The typical process takes around 2-4 weeks to complete from start to finish.