Lead Application Engineer

About the role

This position involves defining and leading the development of advanced packaging and 3DIC analysis flows for foundry and customer solutions. The candidate will have expert knowledge of the Cadence toolset and/or equivalent competitor toolsets in the context of multiple flows including high-speed signal design, power design, signal integrity, power integrity, and definition of electrical constraints.

Design experience and industry knowledge of Signal, Power, or Thermal analysis associated with IC, package, or PCB design is required. The candidate must analyze the customer's environment, evaluate appropriate solutions, and anticipate technical issues to develop creative solutions before they become problems. This role takes technical lead on a wide range of projects and collaborates with peers, other business groups, Cadence R&D, Product Engineering, and Marketing to ensure customer success.

Responsibilities

• Lead the development of advanced packaging and 3DIC analysis flows for foundry and customer solutions.
• Apply expert knowledge of Cadence or equivalent competitor toolsets in high-speed signal design, power design, signal integrity, power integrity, and electrical constraints.
• Analyze customer environments and evaluate appropriate technical solutions.
• Anticipate technical issues and develop creative solutions proactively.
• Take technical leadership on a wide range of projects.
• Understand high-speed, high-performance signal and power integrity-related issues and collaborate with peers and other business groups.
• Communicate effectively with Cadence R&D, Product Engineering, Marketing, and customers.
• Ensure customer success by understanding and meeting their success criteria.

Requirements

• Bachelor’s degree in Electrical or Electronics Engineering (Master’s preferred).
• Minimum 15 years of experience with Signal Integrity, Power Integrity, Electromagnetics, Thermal, and RF related to Package and PCB Design.
• 5+ years of experience with Cadence SI/PI tools, including the Allegro platform tools: Sigrity, Clarity, PCB Editor, and ICP.
• Strong knowledge of advanced packaging concepts and 2.5D, 3DIC, and stacked die technologies.
• Understanding of chip-level CMOS design concepts (desired).
• Strong customer-facing communication and problem-solving skills.
• Strong personal drive for continuous learning and expanding professional skill sets.
• Excellent verbal and written communication skills.

Benefits

• Paid vacation and paid holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan.
• A variety of medical, dental, and vision plan options.

Pay

The annual salary range for this position in Washington is $92,400 to $171,600. You may also be eligible for incentive compensation, including bonus and equity. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Compensation may vary based on qualifications, skill level, competencies, and work location.

Location: Remote role, but must be located in the US.