Jobs · Engineering · California

Lead Analog IC Designer

Cadence · San Jose, CA · 2 wk ago
Engineering$115k–$213k/yrFull-time

Job Description

The lead Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications. Candidate’s background should include a minimum of 3 years of experience in CMOS SerDes or high-speed I/O IC design and development. Working knowledge of a set of common SerDes standards and their electrical requirements is a plus. Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators. Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment.

Requirements

Position requires proficiency in using CAD tools for circuit simulation, layout, and physical verification. Cadence tool experience, lab test experience, and design experience at >112Gbps and in

Pay

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits.

Schedule

Not specified.

Benefits

Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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