Hardware Design Engineer - ASIC

Primary Responsibilities

• Design and implement RTL for custom hardware solutions using SystemVerilog.
• Collaborate on hardware architecture and feature development initiatives.
• Translate system requirements into scalable digital designs.
• Support the deployment and ongoing evolution of advanced hardware platforms.
• Create simulation environments and test strategies for RTL validation.
• Develop automated testing infrastructure to improve design quality.
• Debug and resolve functional, timing, and integration challenges.
• Analyze hardware behavior and performance to ensure design objectives are achieved.
• Contribute to best practices surrounding verification and validation methodologies.
• Build tooling and automation that enhances engineering efficiency.
• Develop scripts to streamline design, testing, and deployment workflows.
• Identify opportunities to improve engineering processes and team productivity.

Qualifications

• Bachelor's degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Professional experience with RTL development and digital logic design.
• Strong proficiency with SystemVerilog.
• Solid understanding of digital systems, timing, and hardware architecture concepts.
• Experience developing verification plans and validation environments.
• Familiarity with clock domain crossings and multi-clock system design.
• Knowledge of Ethernet and networking fundamentals.
• Programming or scripting experience using C++, Python, Bash, or similar languages.
• Excellent troubleshooting and problem-solving abilities.
• Strong collaboration and communication skills.

Preferred Experience

• Experience working on ASIC development projects.
• FPGA design experience, particularly within ASIC-oriented workflows.
• Familiarity with high-speed communication and networking technologies.
• Knowledge of PMA and related physical interface technologies.
• Experience designing systems where latency and performance are key considerations.
• Exposure to electronic trading, financial infrastructure, or other real-time computing environments.
• Background building automated verification systems and testing frameworks.
• Advanced software development experience in C++.