ASIC Design Engineer

About the role

NVIDIA is seeking an ASIC Design Engineer to join our skilled engineering team. This role involves building powerful SoC and GPU products that support various applications, including consumer graphics, self-driving cars, and artificial intelligence.

Responsibilities

• Drafting microarchitecture documents and implementing high-performance, and area and power-efficient RTL to meet strictly defined development targets and specifications.
• Analyzing architectural trade-offs based on features, performance requirements, and area/power constraints.
• Crafting micro-architecture, implementing them in RTL, and delivering fully verified, synthesis/timing clean builds.
• Collaborating closely with architects, other designers, and pre and post silicon verification teams to deliver world-class RTL builds.
• Working on a diverse list of IPs, including GPU's time distribution system, engine scheduler, interrupt controllers, and copy engines.
• Assisting the silicon bring-up team in debugging and post-silicon validation activities.

Requirements

• BS/MS Degree or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science.
• 2+ years of relevant RTL design work experience.
• Strong in micro-architecture and RTL development (Verilog), as well as entire front-end flows including logic synthesis, power, and timing analysis.
• Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic.
• Strong coding skills in Perl, Python, or other industry-standard scripting languages.
• Excellent interpersonal skills and a proven ability to work well in a team.

Qualifications

• Strong C/C++ skills.
• Experience in multi clock domains and asynchronous logic, interface protocols and arbitration schemes.
• Outstanding debugging, problem-solving, and analytical abilities.

Skills

• Strong knowledge of Verilog and related hardware description languages.
• Experience with digital design tools such as Cadence, Synopsys, or Mentor Graphics.
• Understanding of computer architecture and computer arithmetic.
• Experience with power and timing analysis tools.
• Experience with IP integration and verification.

Benefits

• Competitive base salary ranging from $116,000 to $189,750 for Level 2, and $136,000 to $218,500 for Level 3.
• Equity and comprehensive benefits package.

Pay

• Base salary range: $116,000 - $189,750 for Level 2, and $136,000 - $218,500 for Level 3.

Schedule

• Full-time position.

Application Instructions

• Applications are accepted until July 19, 2026.