ASIC Digital Design Engineer

About the role

This position offers an opportunity to collaborate with team leaders to explore and clearly identify real problems and solutions. The role involves refining and improving the microarchitecture of the IP to optimize performance, I/O, power consumption, area utilization, recurring cost, and security functions. Responsibilities also include implementing and simulating IP blocks in RTL using SystemVerilog, VHDL, and other languages, integrating complex systems that instantiate both the organization's and third-party IP, contributing to all aspects of design success from specification to production, applying state-of-the-art IP to ASIC and FPGA products in the real world, and using high-quality design methods and processes to achieve excellent results.

Responsibilities

• Collaborate with team leaders to explore and clearly identify real problems and solutions.
• Refine and improve the microarchitecture of the IP to optimize performance, I/O, power consumption, area utilization, recurring cost, and security functions.
• Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages.
• Integrate complex systems that instantiate both the organization's and third-party IP.
• Contribute to all aspects of design success from specification to production.
• Apply state-of-the-art IP to ASIC and FPGA products in the real world.
• Use high-quality design methods and processes to achieve excellent results.

Qualifications

• Education Requirements: Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field. Also requires 2+ years of job-related experience, or a Master's degree and 6 months of job-related experience.
• Clearance Requirements: Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Skills and Abilities

• Solid technical understanding of FPGA or ASIC product development.
• Experience with SystemVerilog, VHDL, and Test-Driven Development principles.
• Ability to communicate clearly in person and in written documentation.
• Degree in Computer Engineering, Computer Science, Electrical Engineering or related field.
• Identifies opportunities to apply AI for continuous improvement and innovation.

Pay

USD $114,489.00/Yr. - USD $120,750.00/Yr. This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary.

Schedule

• Hybrid (Part-Time Remote),
• Remote Full-Time,
• On-Site Full-Time

Hiring Company

General Dynamics Mission Systems, Inc.