Foundry Technology Engineer

About the role

We are seeking an accomplished Engineer to join Cisco's Component Quality and Technology team (CQT), driving the development and mass production of next-generation Silicon Photonics (SiPh) and Electronic Integrated Circuits (EICs). In this role, you will serve as the primary interface between Cisco engineering and high-volume manufacturing (HVM) foundries, owning end-to-end process integration, device qualification, and bring-up for both photonic and electronic ICs. You will translate design intent into manufacturable, reliable, and testable solutions that power the future of global networking.

Responsibilities

• Foundry Management: Lead the end-to-end PIC and EIC tape-out lifecycle — from device-level design recommendations and PDK engagement through DRC sign-off, process integration, and foundry qualification. Drive bring-up of new process nodes and technology platforms in partnership with internal design and external foundry teams.
• Process Engineering: Develop, modify, and optimize photonic and electronic process flows across SiPh and CMOS platforms by using CMOS fabrication capabilities. Conceptualize and implement critical process modules with a strong emphasis on design-for-manufacturing (DFM) principles, ensuring robust process windows and high yield from initial integration through HVM ramp.
• Validation & Testing: Lead the development and validation of optical and electrical Process Control Monitors (PCMs) and automated test plans for passive and active PIC and EIC components, including Si-based modulators and Ge photodetectors. Apply design-for-test (DFT) methodologies to ensure testability is built into the design from tape-out through production.
• Quality & Yield Optimization: Implement root-cause analysis and Design of Experiments (DOE) to address failure mechanisms in discrete and integrated components. Apply design-for-reliability (DFR) frameworks to anticipate and eliminate failure modes early in the development cycle, and drive qualification.

Requirements

• PhD or MS in Electrical Engineering, Optics, Photonics, or a related field.
• 4+ years of validated experience in chip development, foundry management, and process qualification, with demonstrated success in high-volume production environments.
• Direct experience working with external foundries (e.g., TSMC, GlobalFoundries, Tower, or comparable SiPh foundries) on process bring-up and qualification is helpful.
• Knowledge in the design-for-manufacturing (DFM), design-for-reliability (DFR), and design-for-test (DFT) principles applied to the fabrication, integration, and characterization of PIC and EIC devices, across the full device lifecycle from early-stage design review through sustained HVM.
• Hands-on experience with wafer-level testing, lab automation, and bring-up and debugging of photonic and electronic ICs within high-volume production environments. Comfortable owning qualification test plans and interfacing directly with foundry process engineers.

Preferred Qualifications

• Proficient in IC design tools including Cadence Virtuoso, Synopsys, and layout.
• Shown ability to lead multi-functional technical teams and run complex vendor/foundry relationships, including process roadmap negotiations and qualification milestone ownership.
• Familiarity or hands-on experience with near-package optics (NPO) or co-packaged optics (CPO) architectures is a plus.
• Prior experience in volume manufacturing within a silicon photonics foundry environment.
• Proficiency with sophisticated simulation tools for photonic and electronic IC design (e.g., ANSYS Lumerical).
• Demonstrated ability to contribute to and lead projects within matrixed, geographically distributed technical teams.

Pay

The starting salary range for this position is $154,900.00 to $225,300.00 (U.S. and/or Canada locations), not including incentive compensation, equity, or benefits. Individual pay is determined by hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training.

New York City Metro Area: $154,900.00 - $259,100.00

Non-Metro New York State & Washington State: $136,500.00 - $228,300.00

Benefits

• Medical, dental and vision insurance
• 401(k) plan with Cisco matching contribution
• Paid parental leave
• Short and long-term disability coverage
• Basic life insurance
• Grants of Cisco restricted stock units (vesting following continued employment for defined periods)
• 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
• 1 paid day off for employee's birthday
• Paid year-end holiday shutdown
• 4 paid days off for personal wellness
• Non-exempt employees: 16 days of paid vacation per full calendar year (accrued at 4.92 hours per pay period for full-time)
• Exempt employees: flexible vacation time off program (no defined limit, subject to availability and business limitations)
• 80 hours of sick time off provided on hire date and each January 1st thereafter; up to 80 hours of unused sick time carried forward year to year
• Additional paid time away may be requested for critical or emergency family issues
• Optional 10 paid days per full calendar year to volunteer
• Annual bonuses for non-sales roles (subject to Cisco policies)
• For sales roles: performance-based incentive pay on top of base salary, split between quota and non-quota components. Quota-based incentive pay: 0.75% of incentive target per 1% of revenue attainment up to 50% of quota; 1.5% per 1% between 50%-75%; 1% per 1% between 75%-100%; above 100%, rates at or above 1% per 1% with no cap. Non-quota-based elements: 0% up to 125% of target. No minimum threshold for sales incentive compensation to be paid.