Foundry Device Engineer
About the role
Intel Foundry is Intel's externally facing foundry business, delivering world-class semiconductor manufacturing solutions to a broad and growing customer base. The Manufacturing Development and Customer Engineering (MDCE) organization serves as the critical bridge between advanced technology development and scalable, high-volume manufacturing. We are seeking a highly skilled and experienced CMOS Device Technologist to join the MDCE Device team. In this role, you will be at the forefront of developing and customizing semiconductor technologies for high-volume manufacturing, with a focus on general-purpose logic CMOS technologies.
Your work will support a broad spectrum of products and markets, including high-performance compute, mobile, mixed signal, memory controllers, and other diverse applications. This is an opportunity to directly contribute to the advancement of Intel Foundry's semiconductor solutions, working alongside world-class engineers to push the boundaries of device performance, power efficiency, and technology scaling.
Locations: Hillsboro, Oregon; Chandler, Arizona; or Santa Clara, California.
Responsibilities
- Collaborate with the Technology Development team to develop new device technologies and customize newly developed device architectures to meet specific foundry customer needs
- Partner with manufacturing teams to develop and refine fabrication processes that meet device specifications and yield targets
- Develop CMOS logic device technologies supporting high-performance compute, mobile, mixed signal, memory controllers, and broad market applications
- Drive the development and implementation of customized semiconductor device technologies, ensuring compatibility with Intel's existing manufacturing processes and platforms
- Leverage data analysis, scripting, and analytical techniques to accelerate learning cycles and resolve process and manufacturing challenges
- Contribute to design of experiments (DOE) and engineering data analysis to identify and address yield and performance challenges
Qualifications
Minimum Qualifications:
- Master’s degree in electrical engineering, physics, or related field of study with 5+ years of experience in CMOS device engineering
- Experience in CMOS device technology, preferably in a foundry environment
- Knowledge of CMOS device physics and fabrication of advanced transistor device architectures
- Experience with data analysis, scripting, and data analytic techniques to accelerate learning
Preferred Qualifications:
- Ph.D. Degree in Electrical Engineering, Physics, or related field of study
- 7+ years of experience in CMOS device engineering
- Advanced node semiconductor technology device development
- Generation and analysis of device parametric data, design of experiment (DOE) principles, and engineering data analysis tools
- Device data analysis for identifying and resolving process and manufacturing challenges
- Track record of delivering results in a fast-paced environment
- Experience working in advanced FinFETs / GAA FETs
- High-Volume Manufacturing environment
Skills
- Exceptional communication skills — to convey complex technical concepts clearly and effectively to diverse audiences
- Collaborative mindset — proven skills to work within globally diverse, cross-disciplinary teams
- Intellectual curiosity — a genuine desire to continuously learn and grow within a rapidly evolving field
- Leadership and influence — capacity to lead and influence cross-functional teams without direct authority
- Adaptability and resilience — skills to thrive and deliver results in a fast-paced, ambiguous environment
- Problem-solving orientation — a structured, analytical approach to tackling complex technical and organizational challenges
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
Pay
Annual Salary Range for jobs which could be performed in the US: $161,550.00 - $317,600.00 USD. The range displayed reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Schedule
This role follows Shift 1 (United States of America) and is eligible for Intel's hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site.