Failure Analysis OFI Engineer

About the role

Samsung Austin Semiconductor is a world leader in advanced semiconductor technology. This position involves applying failure analysis methods and techniques to support failure analysis submissions utilizing OFI tools, primarily Photon and Thermal emission type.

Responsibilities

• Conduct physical failure analysis from low yield lots, baseline material, qualifications, and customer requests.
• Identify the cause of failure by performing sample selection and identifying optimal analysis techniques to ensure fast and accurate results for both internal and external customers.
• Support manufacturing and engineering teams with failure analysis results for new process and product introduction, and product transfer activities with Integration and Process Engineering teams.
• Represent the Analysis Engineering department in foundry customer meetings, providing on-time analysis results.
• Analyze electrical and imaging results to find the root cause of issues and publish findings to team members and customers.
• Recommend analysis approaches based on customer failure mode data and our own electrical isolation results and abilities.
• Generate and compile quality FA reports to internal and external customers to assist in issue resolution.

Qualifications

• B.S. to PhD in Electrical/Electronic Engineering, Material Science, Physics or closely related discipline.
• Good understanding of semiconductor FinFET fabrication process and semiconductor device physics (e.g. Transistor, PN Junctions).
• Basic knowledge and understanding of wafer/die level semiconductor Automated Test Equipment (ATE) tests and FA methodologies.
• Strong analytical thinking and problem-solving ability.
• Strong project management, written, and verbal communication skills.
• Teamwork-oriented player with good communication and interpersonal skills.
• Able to work in a fast-paced and multi-tasking environment.
• Able to refine complex FA data into Fab language summary in generating FA report (a plus).
• Hands-on experience on FA tools and techniques (SEM, FIB, PVC, OBIRCH & PEM), or ATE systems such as Teradyne UFLEX, Advantest V93K or T2000 (a plus).
• Able to interpret FA and electrical ATE test data from die level down to transistor level (a plus).
• Able to interpret and understand Wafer Level Reliability stress data such as TDDB, HCI, HTOL etc (a plus).
• Experience with layout software (Camelot and/or Avalon) (a plus).
• Experience in handling customer returns FA (a plus).
• Experience in developing new FA techniques and automation scripts using Python (a plus).

Pay

The current base salary range for this role is between $76,000 - $145,000. Individual base pay rates will depend on factors including duties, work location, education, skills, and experience.

Benefits

• Medical, dental, and vision insurance
• Life insurance and 401(k) matching with immediate vesting
• Onsite café(s) and workout facilities
• Paid maternity and paternity leave
• Paid time off (PTO) + 2 personal holidays and 10 regular holidays
• Wellness incentives and MORE