Director, Package Design Engineering

About the Company

Renesas is one of the top global semiconductor companies, striving to develop a safer, healthier, greener, and smarter world. Our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure, and IoT markets. With a robust product portfolio including world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions, we are a key supplier to leading electronics manufacturers. Renesas employs roughly 21,000 people in more than 30 countries worldwide, fostering a culture grounded in transparency, agility, global collaboration, innovation, and entrepreneurship.

Responsibilities

• Lead package technology development, new product introduction (NPI), and R&D for global OSAT management, including new package development, product qualification, technology roadmap definition, R&D budget management, and customer adoption programs.
• Design and develop package and interconnect methods for Renesas’s AI/datacenter infrastructure power packaging needs, focusing on Smart Power Stages, Vertical Power Stages, Power Modules, and Discrete FET packages.
• Develop wide-bandgap (WBG) technologies such as SiC and GaN, along with DBC, AMB substrates, and advanced interconnect technologies. Knowledge of wafer-level, flip-chip, multi-chip module, and power devices is a plus.
• Benchmark, select, and qualify suitable materials, processes, and assembly subcontractors (OSAT) or contract manufacturers (CM).
• Collaborate with OSAT/CM to develop, run DOE to optimize processes, and establish process specifications.
• Work with product groups and the reliability team to qualify new packages and processes within required timeframes.
• Resolve process integration issues by ensuring all window checks are completed on critical process steps.
• Establish production controls and monitors to prevent quality incidents.
• Ensure smooth transition into production and implement ramp-up monitoring.
• Monitor and resolve process issues early in the production phase to ensure only superior quality parts are shipped to customers.
• Develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer-level packaging, and flip-chip interconnects.
• Participate in packaging roadmap development and execution.
• Address internal and external customer complaints by collaborating with marketing, product groups, quality, and operations teams to support business growth.
• Establish and maintain package design rules.

Requirements

• Doctorate, Master’s, or Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical, or Materials Engineering.
• 15 to 20 years of relevant experience in package development, with an emphasis on power SiP/module, wafer-level, and flip-chip packaging.
• Strong understanding of power SiP/modules, wafer-level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC, and statistical analysis software.
• Knowledge of wire-bonding and multi-chip module technologies is a plus.
• Strong interpersonal, communication, analytical, and presentation skills.

Renesas is an embedded semiconductor solution provider focused on making lives easier through world-leading technology for automotive, industrial, infrastructure, and IoT markets. Our culture, TAGIE, is built on transparency, agility, global collaboration, innovation, and entrepreneurship.