Director of Advanced IC Packaging Development

Renesas is seeking a leader to drive the Next Generation Power Packaging roadmap, enabling the AI and Datacenter revolution through cutting-edge Smart Power Stages, Vertical Power Stages, Power Modules, and Wide Bandgap (SiC/GaN) solutions. This role oversees the entire lifecycle from R&D and NPI to high-volume global OSAT management, ensuring Renesas remains at the forefront of power density and thermal efficiency.

Responsibilities

• Technology Roadmap & R&D Strategy
  • Define and execute the global packaging roadmap, focusing on Power SiP/Modules, Wafer Level Packaging, and Flip-Chip technologies.
  • Lead R&D initiatives for Wide Bandgap (SiC & GaN) power devices, utilizing advanced substrates like DBC (Direct Bonded Copper) and AMB (Active Metal Brazing).
  • Manage the annual R&D budget and oversee customer adoption programs to align technical capabilities with market demand.
  • Establish and maintain corporate package design rules to ensure manufacturability and reliability.
• Global OSAT & Supply Chain Management
  • Benchmark, select, and qualify global OSATs and Contract Manufacturers (CM) for new package technologies.
  • Drive DOE (Design of Experiments) with partners to optimize assembly processes and establish rigorous process specifications.
  • Monitor production early in the ramp phase to resolve integration issues and ensure superior quality.
• NPI, Qualification & Quality Control
  • Lead the transition of new products from R&D to High Volume Manufacturing (HVM).
  • Collaborate with Product and Reliability teams to qualify new packages within aggressive timeframes.
  • Resolve process integration bottlenecks by ensuring exhaustive window checks on critical process steps.
  • Implement SPC (Statistical Process Control) and production monitors to prevent quality incidents and excursions.
• Cross-Functional Leadership
  • Act as the technical authority for internal and external customer complaints, working with Marketing, Quality, and Operations to provide root-cause analysis and resolutions.
  • Maintain a competitive edge by staying current on industry innovations in interconnect methods (Wire-bonding, Multi-chip modules, etc.).

Requirements

• Doctorate, Master’s, or Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical, or Materials Engineering.
• 15 to 20 years of relevant experience in semiconductor package development, specifically emphasizing power SIP/modules and wafer level & flip-chip packaging.
• Deep knowledge of Power SiP/Modules, Flip-Chip, and Wafer Level assembly.
• Familiarity with Smart Power Stages and Vertical Power architectures.
• Expertise in SPC, statistical analysis software, and qualification methods.
• Exceptional interpersonal, presentation, analytical, and communication skills.

Pay

The expected annual pay range for this position is $200K - $250K, with eligibility for bonus opportunities. Final offer amount will depend on geographic location, applicable experience, and skillset of the candidate.

Benefits

• Elective benefits including medical, health savings account (with applicable medical plan), dental, vision, health and/or dependent care flexible spending accounts, pre-tax commuter benefits, life insurance, AD&D, and pet insurance.
• Company-paid life insurance and AD&D, LTD, short-term medical benefits.
• Paid sick time, paid holidays, and accrued paid vacation.
• New employees attend a detailed benefit orientation to learn about available benefits and resources.