DFT Staff Engineer
AMD · Santa Clara, CA · 3 days ago
HybridEngineeringFull-time
About the Role
As a member of the Cores DFT Team, the successful candidate will own the ATPG responsibilities for the next generation of AMD high-performance cores.
Key Responsibilities
- Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression
- Experience in debugging low coverage and DRC fixes
- Proficient in logic design using Verilog
- Experience in debugging test pattern issues
- Support of Silicon bringup activities
- Experience with post-silicon debug
- Comfortable in Linux environment and writing/using scripting languages such as Perl, Tcl, etc.
- Experience with Tessent Scan/ATPG
- Excellent presentation and inter-communication skills
Qualifications
- Bachelor's degree in Electrical Engineering/Computer Engineering
Preferred Experience
- Hands-on expertise with commercial test generation tools for large complex designs
- Strong fundamental knowledge of DFT techniques including JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST, LBIST
- Experience running test compression software
- Strong sense of ownership
- Self-driven
Academic Credentials
Master's degree in Electrical Engineering/Computer Engineering
Location
Santa Clara, CA