DFT Engineer
Umanist NA · Santa Clara, CA · 2 mo ago
On-siteEngineeringContract
Location: Santa Clara, CA (Onsite)
About the role
We are seeking experienced DFT Engineers with 5+ years of hands-on experience in Design for Test (DFT) and ATPG for SoC/ASIC designs. The ideal candidate will support cutting-edge semiconductor programs in a fast-paced, high-performance environment.
Responsibilities
- Scan-based testing and DFT fundamentals, including controllability and observability
- ATPG pattern generation, analysis, and debug
- MBIST architecture, implementation, and diagnostics
- IO test methodologies and pin-level validation
- Clock DFT and clock verification
- Digital design and RTL fundamentals
Requirements
- 5+ years of hands-on experience in DFT and ATPG for SoC/ASIC designs
- Strong understanding of DFT fundamentals
- Experience using industry-standard DFT/ATPG EDA tools
- Excellent debugging, analytical, and problem-solving skills
Qualifications
- Bachelor's degree in Engineering (BE/B.Tech or equivalent)