DFT Engineers

5+ years of hands-on experience in DFT and ATPG for SoC or ASIC designsStrong understanding of DFT fundamentals including controllability, observability, and scan-based testingProven expertise in ATPG pattern generation, analysis, and debugExperience with MBIST, including memory test architectures and diagnosticsKnowledge of IO Test methodologies for interface and pin level validationSolid understanding of clock DFT and clock verification conceptsStrong grasp of digital design and RTL fundamentalsExperience with industry standard DFT/ATPG EDA toolsAbility to work effectively in fast paced, high performance semiconductor programsStrong analytical, problem solving, and communication skills