DFT Design Engineer

About the role

The Altera DFT team is seeking a motivated DFT (Design for Testability) Design Engineer to join an industry-leading IC design organization. This role involves working on cutting-edge technologies including FPGA, processor, DSP, SERDES, IO, 2.5D/3D multi-die packaging, and other advanced solutions that drive future innovation.

Responsibilities

• Define and implement DFT architectures and specifications for FPGA, processors, DSP, SERDES, IO, and multi-die designs.
• Perform test logic insertion, ATPG pattern generation, and pre-silicon validation for manufacturability and quality.
• Collaborate with IP and integration design teams to align DFT features with design functionality and timing.
• Partner with test development teams to support silicon bring-up, debug, and production readiness.
• Contribute to DFT methodology and automation flows to enhance scalability and efficiency.
• Ensure manufacturability goals are met, including test coverage, test cost optimization, yield improvement, and debug support.

Qualifications

• Minimum Qualifications: Bachelor’s Degree in Electrical Engineering, Computer Engineering, or related field with 7+ years of industry experience in the following:
• Experience in DFT design and verification at both RTL and gate levels.
• Experience in EDA tools such as synthesis and scan insertion tools, ATPG tools, simulation and debug tools, STA tools.
• Design automation experience and proficiency in scripting languages such as Perl/TCL.
• Prior experience with test compression, BIST (MBIST/LBIST), and advanced fault models.
• Prior experience with 2.5D/3D multi-die designs and high-speed IO/SerDes DFT.