Design Engineer

Key Responsibilities

• Assist in designing and developing digital logic for ASIC and FPGA-based systems.
• Write and maintain RTL code using Verilog or SystemVerilog.
• Participate in the design, implementation, and optimization of digital circuits.
• Collaborate with verification, physical design, and architecture teams to ensure design quality.
• Perform functional simulations and debug RTL issues.
• Analyze timing, area, and power considerations during the design process.
• Support synthesis, linting, and static design checks.
• Review design specifications and contribute to technical documentation.
• Participate in design reviews and follow engineering best practices.
• Stay updated with the latest semiconductor technologies, design methodologies, and EDA tools.

Required Skills

• Knowledge of logic simulation and debugging techniques.
• Basic understanding of ASIC or FPGA design flow.
• Familiarity with Linux/Unix operating systems.
• Exposure to version control systems such as Git.
• Strong analytical, debugging, and problem-solving skills.
• Good communication and teamwork abilities.

Preferred Skills

• Exposure to FPGA development using Xilinx or Intel (Altera) platforms.
• Familiarity with EDA tools such as Synopsys Design Compiler, Cadence, or Siemens EDA (Mentor Graphics).
• Basic understanding of synthesis, timing analysis, and clock domain crossing (CDC).
• Knowledge of scripting languages such as Python, Perl, or Tcl.
• Understanding of low-power design concepts.
• Familiarity with semiconductor design flows and industry standards.
• Exposure to Agile/Scrum development methodologies.
• Internship or academic project experience in VLSI, ASIC, or FPGA design.