ASIC Verification Engineer - New College Grad 2026
What You'll Be Doing
- Verifying the ASIC design, architecture, golden models and micro-architecture of GPU and SoC units using Emulation and Prototyping platforms.
- Understanding the design, defining the verification scope, developing the verification infrastructure, and verifying the correctness of the RTL design.
- Developing tools to manage and improve verification processes.
- Collaborating with architects, designers, and software teams to accomplish your tasks.
What We Need To See
- Recent graduate with BS or MS in Electrical/Computer Engineering, Computer Science, or equivalent experience.
- Hardware engineering background with knowledge of Digital Design, VLSI, and/or Computer Architecture.
- Exposure to design and verification tools (VCS or equivalent simulator tools; debug tools like Verdi, Debussy, GDB).
- Background in building testbench environments for unit level verification.
- Expertise in System Verilog and Verilog.
- C++ programming language experience and Perl/Python scripting knowledge.
- Excellent debugging, analytical, and problem-solving skills.
Ways To Stand Out From The Crowd
- Experience with PCIe and Memory protocols is highly desirable.
Pay
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 100,000 USD - 166,750 USD for Level 1, and 116,000 USD - 189,750 USD for Level 2.
Schedule
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Come join our Emulation team and help us build future interconnect architectures that will continue to drive us forward in the fields of High Performance Computing, Graphics and AI.
Benefits
You will also be eligible for equity and benefits.
Application
Applications for this job will be accepted at least until July 11, 2026.