ASIC Engineer (hybrid)
Application window expected to close on: 10/15/2026
About the role
Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Design, document, and develop ASIC subsystems for release in high volume and quality. Help define the process, methods, and tools for design and implementation of complex developments.
Responsibilities
- Collaborates on the definition and design of high performance ASICs
- Oversees project code
- Owns complex code, and debugs within and outside of owned code
- Documents functional and user specs for code
- Builds out design by completing block level flow, from block spec to tapeout
- Contributes to resolution of block level issues
- Writes and executes test plans and test benches
- Leads design verification activities
- Leads reviews for owned code
- Writes and executes test plans and test benches concerning analog/mixed signal products
- Owns physical design of multiple blocks or one high complexity block
- Guides RDL block owners on RTL changes
- Drives Signal and Power integrity for the ASIC integration
- Understands and drives development milestones to success
- Analyzes and validates subsystems
Qualifications
Minimum Qualifications: Typically: Bachelors + 5 years of related experience, or Masters + 3 years of related experience, or PhD + 0 years of related experience
Preferred Qualifications: Varies based on the team and business needs
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology