ASIC Design Verification Technical Leader - Acacia (hybrid)

About the role

The ASIC Design Verification Technical Lead Engineer will be working on next-generation 100G-1.6T coherent optical communications products. This role is for a senior contributor & technical leader focused on verifying highly complex ASICs that are used in these next-generation systems.

Responsibilities

• Lead and develop detailed and comprehensive test plans
• Lead and develop verification test benches
• Apply innovative verification techniques to complex designs
• Supervise the timely execution of test plans by the rest of the team
• Lead and assist with chip-level design tradeoffs by working with design engineers
• Participate in the review of design verification coding and coverage metrics
• Provide technical leadership & mentoring
• Work collaboratively with the team to develop & incorporate the latest test technologies & processes

Requirements

• Lead and develop detailed and comprehensive test plans
• Lead and develop verification test benches
• Apply innovative verification techniques to complex designs
• Supervise the timely execution of test plans by the rest of the team
• Lead and assist with chip-level design tradeoffs by working with design engineers
• Participate in the review of design verification coding and coverage metrics
• Provide technical leadership & mentoring
• Work collaboratively with the team to develop & incorporate the latest test technologies & processes

Qualifications

• Bachelor's or Master’s degree majoring in Computer Science, Computer Engineering, or Electronic or Electrical Engineering, with 12+ years of experience using the latest ASIC verification methodologies, tools, and scripting/programming languages
• Experience with SystemVerilog/UVM
• Experience with in-house Verification Intellectual Property (VIP) development strategy

Preferred Qualifications

• Experience with C++ hybrid test benches
• Consistent track record of innovation that leads to quantifiable improvements
• Self-motivation and the ability to implement effectively without supervision
• Experience leading ASIC technical teams
• Knowledge of DSP algorithms and modulation techniques such as QAM
• Knowledge of Formal Verification methodologies and tools such as Jasper or VC

Skills

• Knowledge of object-oriented verification methodologies

Benefits

At Cisco, we offer competitive salaries, a comprehensive benefits package, and a supportive work environment. Details on the salary range and benefits are provided in the message to applicants.

Pay

$174,700.00 to $253,400.00

Schedule

Full-time