ASIC Design Verification Engineer
Responsibilities
- Development of new simulation environments
- Execution of verification plans while collaborating with verification and design teams
- Debugging complex problems
Requirements
- Bachelor’s or Master's degree in Electrical Engineering, Computer Engineering or equivalent
- 2+ years of proven experience in IP or SoC verification
- Hands-on experience with UVM and constrained-random verification
- Strong proficiency in SystemVerilog and Python
- Prior experience with mixed-signal verification is a plus
- Experience with DRAM protocol: DDR/LPDDR/GDDR is a plus
- Experience working in fast-paced, highly collaborative engineering environments
- Interest in applying AI/ML techniques to improve verification flows, automation, or productivity
Qualifications
- Phenomenal teammate with excellent interpersonal communication skills
Skills
- Familiarity with constrained random verification and functional coverage closure
- Excellent problem-solving skills
- Opportunities to adopt and influence emerging AI-based approaches that improve verification productivity, debugging efficiency, and quality
Benefits
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays.
To learn more about Micron, please visit micron.com/careers. For US sites only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at hrsupport_na@micron.com or (1-800-336-8918) (select option #3).