AMS Verification Engineer (RFIC Engineering)

About the role

We are seeking a motivated, proactive, and intellectually curious AMS Verification Engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation RFICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Join us to help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.

Responsibilities

• Develop and own “analog-on-top” and “digital-on-top” design verification flows for full-chip simulations of in-house RFICs and RF-SoCs
• Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs
• Work with designers to improve speed/accuracy of simulations for advanced mixed-signal IPs (PLLs, DACs, ADCs, etc.)
• Work with designers to create behavioral models of RF/analog/mixed-mode circuit blocks, and employ these models in chip verification
• Work with ATE test engineering team to develop and prototype testplans
• Setup and run EM/IR simulations

Requirements

• Bachelor’s degree in an engineering discipline
• 1+ years of research and/or industry experience in the field of integrated circuit design/verification
• Ability to work long hours and weekends as necessary to support critical milestones
• To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C.1157, or (iv) Asylee under 8 U.S.C.1158, or be eligible to obtain the required authorizations from the U.S. Department of State.

Preferred Skills and Experience

• Master’s degree or PhD in an engineering discipline with emphasis in integrated circuit design/verification
• Experience with AMS simulation tools and flows
• Experience with annotated gate-level simulation within an AMS simulator
• Experience in System-Verilog, UVM, Python
• Experience in writing behavioral models for analog/mixed-mode IPs in Verilog-A/AMS
• Understanding of analog circuit fundamentals, and experience simulating circuits such as LDOs, bandgaps, DACs, ADCs, baseband amplifiers, mixers, RF amplifiers, oscillators, PLLs, etc.
• Understanding of combinational logic and basic digital circuit blocks, such as flip-flops, counters, buffers, synchronizers, serializers/de-serializers, etc.; ability to understand RTL and gate-level netlists

Pay

Pay Range

• Level 1: $125,000.00 - $160,000.00
• Level 2: $145,000.00 - $195,000.00

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Benefits

• Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan.
• Comprehensive medical, vision, and dental coverage
• Access to a 401(k) retirement plan
• Short and long-term disability insurance
• Life insurance
• Paid parental leave
• Various other discounts and perks
• 3 weeks of paid vacation
• 10 or more paid holidays per year
• Paid sick leave pursuant to Company policy which satisfies or exceeds the accrual, carryover, and use requirements of the law