Senior AMS Verification Engineer

Job Responsibilities

• Develop test bench environments and directed functional, random, and constrained random tests.
• Implement coverage driven verification methodologies.
• Create functional coverage metrics.
• Ensure these environments allow verification, design, product, and test engineers to efficiently develop functional test cases.
• Define and develop block level modeling and verification strategies based on design requirements and architecture.
• Specify, and perform as necessary, block and chip level RTL, gate, and mixed signal co-simulation regressions.
• Track progress against verification plan.
• Work with designers and product/apps engineers to achieve functional coverage goals and to debug the design and environment.
• Participate in project meetings.

Qualifications

• Minimum requirement of BSEE, MSEE and 3+ years experience preferred.
• Knowledge of System Verilog, UVM and OOP.
• Knowledge of Verilog and Spice simulators.
• Knowledge of Analog circuits and CAD tools (Cadence Virtuoso).
• Ability to problem solve at the circuit and system level.
• Good presentation and writing/communication skills.
• Ability to collaborate in a team environment and across organizations.

Benefits

• Medical, vision and dental coverage.
• 401k.
• Paid vacation, holidays, and sick time.

Pay

The expected wage range for a new hire into this position is $110,385 to $151,808. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

Schedule

1st Shift/Days