Advanced Wafer/Package Assembly Development Integrator

Responsibilities

• Leading teams and driving decisions across any Wafer/Package assembly orgs for key technical gap resolution or technology enablement
• Capable of driving and influencing key stakeholders to drive engineering priorities to meet or beat critical development schedules
• Collaboration with cross-site/functional teams and Intel partners to deliver process requirements on schedule, quality and cost targets
• Virtual Line ownership of baseline material (ENG, TD, DOE)
• Work weekly build forecast and align starts
• Understanding of manufacturing lines and operations
• Partner with design Integration and wafer/package integration teams
• Understanding of substrate assembly and wafer/package test
• Foundational knowledge of materials and their interactions at a wafer/package level
• Work with integration teams, factory organizations (Module and Operations), across single or multiple sites
• Drive execution of critical silicon through all segments of the manufacturing flow to enable on-schedule timelines and milestones
• Drive regular lot management meetings with stakeholders, maintain and assess upstream and downstream schedules and communicate accordingly to customers to ensure clear awareness of delays, or ahead of schedule lot arrival

Qualifications

• Minimum qualifications: MS degree with 5+ years of experience in Wafer/Package assembly, or PHD with 3+ years of experience in Wafer/Package assembly
• Preferred qualifications: Demonstrated the ability to lead collaborative efforts between Virtual factory sites and Development organizations, demonstrated ability to lead and drive activities to successful completion, and mentor others on resolving technical issues, capability to build and maintain schedules and Gantt timelines in excel or other applications, understanding of process flows, understanding of key/control parameter importance and determination of minimum technology requirements for tool sharing/back qualification opportunities