Jobs · Engineering · California

W2 contract || PCB Layout Engineer

Noblesoft Technologies · Menlo Park, CA · 2 mo ago
On-siteEngineeringContract

Location: Menlo Park, CA (Onsite from day one) | Duration: Contract | Type: W2 contract | Minimum experience: 15+ years

About the role

Own end-to-end PCB layout for complex, high-density designs used in data center server boards.

Responsibilities

  • Perform high-speed digital layout for interfaces like HBM, DDR4/5, PCIe Gen 5/6, USB 3.2 or higher, with attention to controlled impedance, length matching, and crosstalk mitigation
  • Develop and enforce layout design rules for high-speed digital, analog, mixed-signal, and power domains within tightly constrained wearable form factors
  • Collaborate with electrical engineers to review schematics and provide layout-driven feedback on component placement, power distribution network design, and signal routing strategies
  • Partner with mechanical engineers to resolve physical constraints including board outline, connector placement, thermal management, and stack-up definition
  • Drive design-for-manufacturability reviews with contract manufacturers and PCB fabricators to ensure layouts meet yield and reliability targets
  • Maintain and improve PCB design standards, layer stack-up libraries, and footprint libraries to support scalable development across multiple hardware programs
  • Support by providing layout documentation, net tracing support, and design revision analysis for prototype and production boards

Requirements

  • Advanced proficiency in Allegro PCB for PCB layout and design
  • Strong knowledge of CAD software for 2D and 3D design applications
  • 10–14 years of CAD experience; Cadence Allegro Layout tool 23.1 and above experience is mandatory
  • Hands-on experience in HDI micro via (blind/buried) technology
  • Intel or high-complexity SoC/Microprocessor/FPGA-based PCB design experience preferred
  • Ability to deliver PCB CAD layout of high-density, high-speed memory designs (DDR5/LPDDR5), PCIe Gen 5 or Gen 6, power delivery, mixed analog/digital
  • Deep knowledge of CES (Constraint Editor) and high-speed constraint-driven designs, DFA/DFM/DFT knowledge to adhere to quality PCB fabrication and assembly assurance
  • Strong communication and presentation abilities to effectively convey design concepts

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