Timing Constraints Engineer (eInfochips)

About the role

The Position Timing Constraints Engineer at eInfochips is responsible for developing and maintaining timing models for complex electronic systems. This role involves working closely with cross-functional teams to ensure that system performance meets specified requirements.

Responsibilities

• Develop and maintain timing models for electronic systems
• Collaborate with design engineers to understand system requirements and constraints
• Perform timing analysis and simulation to validate designs
• Work with verification engineers to integrate timing models into testbenches
• Document and communicate timing results to stakeholders

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
• 2+ years of experience in timing analysis and modeling
• Experience with SPICE or similar circuit simulation tools
• Familiarity with digital design principles and methodologies
• Strong analytical and problem-solving skills
• Ability to work independently and as part of a team

Qualifications

• Advanced degree in Electrical Engineering or Computer Engineering preferred
• Experience with formal verification techniques
• Knowledge of physical design rules and their impact on timing

Skills

• Proficiency in SPICE or other circuit simulation software
• Experience with timing analysis tools such as Cadence Virtuoso, Synopsys Design Compiler, or Mentor Graphics Questa
• Good understanding of digital logic design and circuit theory
• Strong communication and documentation skills

Benefits

• Competitive compensation package
• Flexible work schedule
• Professional development opportunities
• Health insurance benefits
• Employee assistance program

Pay

• $80,000 - $100,000 annually

Schedule

• Full-time position
• Standard 40-hour workweek