Timing Constraints Engineer (eInfochips)

About the role

The Position Timing Constraints Engineer at eInfochips is responsible for designing and implementing timing constraints in electronic design automation tools. This role requires expertise in digital design, signal integrity, and timing analysis.

Responsibilities

• Design and implement timing constraints in electronic design automation tools
• Collaborate with cross-functional teams including hardware and software engineers
• Contribute to the development and improvement of timing analysis methodologies
• Perform root cause analysis on timing issues and develop solutions

Requirements

• Bachelor's degree in Electrical Engineering or related field
• Minimum 5 years of experience in timing analysis and design
• Strong understanding of digital design principles and signal integrity
• Experience with electronic design automation tools such as Cadence Virtuoso, Synopsys Design Compiler, etc.
• Excellent problem-solving and analytical skills

Qualifications

• Master's degree in Electrical Engineering or related field
• Experience with advanced timing analysis techniques
• Knowledge of physical design and layout rules

Skills

• Proficiency in scripting languages like Python or Perl
• Experience with statistical timing analysis tools
• Good communication and interpersonal skills

Benefits

• Competitive compensation package
• Flexible work schedule
• Professional development opportunities
• Health insurance benefits
• 401(k) retirement plan

Pay

$80,000 - $120,000 annually

Schedule

Full-time, Monday through Friday, 9:00 AM to 5:00 PM