Strategic Student Program: Cross-Domain Manufacturing Systems Engineering Intern (T&I, Spring 2027)

About the role

Siemens Industry Software is a leading global software company dedicated to computer-aided design, 3D modeling, and simulation—helping innovative manufacturers design better products, faster. The Strategic Student Program (SSP) recruits students in their 1st or 2nd semester of senior year, or at the graduate level, to apply their education to real-world problems and turn theory into practice. The goal is to empower students to become the next leaders of the company.

The Cross Product Solution Management (CPSM) team researches and develops innovative solutions that demonstrate how modern engineering disciplines work together across Product Lifecycle Management (PLM), robotics, mechatronics, semiconductor manufacturing, electronics, AI, and software engineering. This internship contributes to a "silicon-to-rack" engineering initiative showcasing the integration of EDA, PLM, and AI-enabled workflows across the entire product development lifecycle.

Position Objective: Contribute to the research, development, and documentation of a reference "silicon-to-rack" product development workflow demonstrating how modern CAE, EDA, PLM, and AI technologies connect semiconductor design and packaging, system design, mechanical engineering, and lifecycle management into a unified engineering ecosystem. The initiative spans IC design, packaging, PCB, mechanical, and PLM domains within an integrated engineering workflow.

Responsibilities

• Research and evaluate emerging semiconductor engineering technologies (3D IC) and workflows
• Develop software prototypes, automation tools, and proof-of-concept solutions
• Work on semiconductor, PCB, and system-level design, validation, and implementation concepts
• Document technical findings through white papers, tutorials, and technical guides
• Investigate AI-assisted engineering and documentation workflows
• Learn and utilize industry-leading EDA and PLM tools
• Help define and demonstrate an end-to-end engineering digital thread from silicon design through system deployment

Qualifications

Required:

• Currently enrolled as a university Senior, Master's, or PhD candidate
• Minimum 3.0 GPA
• Authorized to work in the United States without the need for current or future sponsorship
• Graduating 2028 or later
• Pursuing a Bachelor's, Master's, or Ph.D. degree in Mechanical Engineering, Electrical or Electronics Engineering, or related STEM field
• Strong analytical and problem-solving skills
• Excellent verbal and written communication skills
• Ability to learn quickly and work independently
• Self-motivated, curious, and adaptable

Preferred:

• Semiconductor packaging design and implementation research emphasis or exposure
• Interest in CAE, EDA, PLM, automation, or AI technologies
• Familiarity with Linux or scripting environments
• Previous internship, co-op, or project experience

Areas of exposure

• Semiconductor and IC design and CAE methodologies
• 3D-IC and advanced packaging concepts
• Mechanical design integration
• Product Lifecycle Management (PLM)
• Technical documentation and workflow development
• Packaging and manufacturing concepts

Benefits

• Paid volunteer time off
• Employee discounts at top customer sites
• Networking with global leaders
• Mentorship from senior engineers
• Individual career development planning
• Professional and technical workshops
• Energetic student community
• Leadership opportunities
• Potential for full-time offers after university graduation and completion of the program
• Health and wellness benefits (details at www.benefitsquickstart.com)
• Paid sick leave

Pay

Hourly range: $18.00 to $50.00. Actual compensation is based on the successful candidate's work location, degree type, and relevant education.

Location

Detroit, MI; Wilsonville, OR; possible remote depending on degree level being pursued.