Staff SoC RTL Engineer

Quadric is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology powers intelligent edge devices across automotive, industrial, robotics, and embedded systems. Founded by technologists from MIT and Carnegie Mellon, Quadric is a well-funded growth-stage semiconductor IP company with a growing licensing business.

About the role

Quadric is building a revolutionary new processor-based SoC architecture. As a Staff SoC RTL Engineer, you will get in on the ground floor as a key member of our chip design team, contributing across all stages of the SoC design and integration cycle. In this role, you will help define the SoC architecture, own subsystem development, integrate third-party IP, and drive PPA optimization to bring our next-generation platform to life.

Responsibilities

• SoC Subsystem Development & IP Integration
  • Own SoC-level subsystem development and seamless integration with third-party IP (such as NoC, PCIe/UCIe interfaces, DDR, Security, etc.).
  • Contribute directly to the definition of the SoC architecture by deeply understanding its application requirements.
  • Package designs for customer releases and rapidly iterate based on customer feedback.
• PPA Optimization & Timing Closure
  • Own Power, Performance, and Area (PPA) optimization strategies at the SoC level.
  • Apply low-power digital design techniques to optimize hardware efficiency.
  • Contribute to timing closure across the full product lifecycle, spanning front-end, back-end, and final tapeout stages.
  • Balance single-stream latency against scaled throughput performance.

What success looks like

Within your first 6-12 months, you'll:

• Independently own SoC subsystem development and drive measurable PPA improvements.
• Develop an in-depth understanding of the architecture and software interfaces, enabling you to debug complex issues across the full SW/HW stack.
• Successfully package and deliver design releases for customer evaluation and integration.

Requirements

• BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• Minimum 5+ years of hands-on SoC/ASIC front-end design and integration experience.
• Proficiency in SystemVerilog or Verilog.
• Strong background in computer architecture, low-power digital design techniques, and deep technical knowledge in at least one subsystem (Memory, I/O, or Compute).
• Proven experience with SoC subsystems (including 3rd-party IP) and working knowledge of VCS & Verilog/C Co-Simulation.

Preferred Qualifications

• Experience in logic synthesis and performance modeling.
• Experience in FPGA design.
• Familiarity with automotive safety standards (ASIL) and hardware security standards.

Pay

The base salary range for this position is $175,000 to $230,000. This range reflects the full span of levels and geographies at which Quadric hires for this role. The actual base salary offered will depend on factors including the specific level of the role, years and depth of relevant experience, technical skills and competencies, the criticality of the role to the business, internal equity, and work location. In addition to base salary, this role is eligible for equity and a discretionary annual performance bonus.

Benefits

• Medical, dental, and vision insurance from day one – Premiums covered at 99% for employees.
• Company-paid life insurance.
• Voluntary supplemental life insurance.
• STD + LTD insurance.
• Commuter support including parking or Caltrain reimbursement (office is conveniently located within walking distance of the Caltrain station).
• FSA + HSA.
• Equity with the business.
• Paid parental leave.
• 401(k) retirement plan.
• Flexible PTO.
• Winter holiday shutdown.
• Catered lunch each day in the downtown Burlingame office, close to shops, cafes, and local amenities.

Quadric is an equal opportunity employer committed to creating an inclusive environment where people from all backgrounds can do their best work.