Staff FPGA Engineer

About the role

Vector Atomic, an IonQ company, is seeking a highly skilled Staff FPGA Engineer to join our innovative team. The ideal candidate will play a crucial role in designing and implementing FPGA-based instrument systems for the next generation of advanced quantum sensors. This role involves both research and development, with the aim of translating prototypes into scalable commercial products.

Responsibilities

• Collaborate with physicists, electronics engineers, and optical designers to define system requirements and select appropriate FPGA/SoC components along with supporting ICs
• Design and contribute to custom PCB layouts integrating modern FPGA/SoC devices
• Identify critical design challenges affecting PCB layouts to ensure robustness
• Develop synthesizable RTL code using Verilog or VHDL, create test benches, and prepare EDA tool support to meet performance targets
• Lead FPGA board bring-up integration and test activities
• Develop test scripts
• Compile validation documentation
• Mentor early-career engineers on best practices
• Collaborate with the manufacturing team on the release of production-ready code

Requirements

• Bachelor's or Master's degree in Electrical Engineering or a related technical discipline
• Minimum 7 years of relevant FPGA engineering experience for candidates with EE degrees; 10+ years for other technical degrees
• To comply with US export control laws, must be a U.S. citizen (born or naturalized), green card holder, refugee, or asylee
• Proven ability to work effectively in laboratory environments
• Strong verbal and written communication skills
• Expertise in HDL programming (Verilog and/or VHDL) for synthesizable RTL and verification
• Experience with FPGAs with AMD Zynq and AMD Ultrascale+, including RFSoc devices
• Proficiency using EDA tools such as Vivado and Questa
• Solid understanding of hardware signal processing techniques such as digital filters, decimators, PID, etc
• Hands-on experience with laboratory test and measurement instruments (oscilloscopes, power supplies, pulse generators, logic and protocol analyzers)
• Experience writing timing constraints (SDC) to achieve timing closure on high-speed FPGA designs
• Familiarity with common communication protocols (SPI, I2C, AXI, Avalon, Ethernet, AMBA, Wishbone)
• Skilled in scripting for EDA tools, preferably TCL and Python
• Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold timing, and multicycle paths
• Familiarity with revision control and issue tracking software like Git and Jira

Preferred Expertise

• Experience with formal verification methodologies and languages (PSL, SystemVerilog, UVVM, UVM, or OVM)
• Experience working with designs for challenging environmental deployments, including LEO
• Experience creating custom Linux builds using Yocto, PetaLinux, or OpenEmbedded
• Experience managing CI/CD systems, virtualization, and deployment technologies

Benefits

• Platinum-level family health coverage (medical, dental, vision)
• Flexible Spending Accounts (FSA)
• Employer 401(k) contributions
• 20 days of paid time off / 11 paid holidays
• Paid parental leave
• Fully stocked kitchen

Pay Range

The approximate base salary range for this position is $150,000 - $180,000 per year. The total compensation package includes base, bonus, equity, and benefits.