Staff Engineer, Semi Packaging Engineering

About the role

This role will be responsible for the development of advanced packaging solutions for semiconductor devices across various market segments. The packaging solutions must meet demanding product requirements while balancing reliability, manufacturability, and cost.

Responsibilities

• Lead the design, development, and qualification of semiconductor packaging solutions, including wire-bond, flip-chip, system-in-package, and module-based products.
• Provide technical leadership in package mechanical and thermal analysis to support package architecture selection, design optimization, and reliability risk assessment.
• Perform mechanical simulations of IC packages and systems using FEM tools to evaluate chip-package interaction, package-board interaction, warpage, stress, and reliability risks.
• Perform component- and system-level thermal simulations for semiconductor packages using commercial simulation tools.
• Work closely with cross-functional teams to understand product and packaging requirements, identify customer needs, and resolve complex technical issues.
• Collaborate with OSAT partners, substrate suppliers, and material vendors to resolve technical issues, drive process development, optimize manufacturing processes, and improve yield.
• Develop and maintain package design guidelines, process specifications, simulation methodologies, and technical documentation.

Requirements

• PhD or Master’s degree in Mechanical Engineering or Electrical Engineering.
• 5+ years of hands-on experience in semiconductor packaging development, package simulation, or packaging manufacturing.
• Strong understanding of IC packaging materials and their mechanical, thermal, and electrical behaviors.
• Strong knowledge of IC package structures, substrate technologies, and semiconductor assembly processes.
• Hands-on experience with major FEM tools; ANSYS experience is preferred.
• Experience with FloTHERM, Sigrity, or Icepak is a plus.
• Experience with Cadence Allegro is a plus.
• Strong analytical, problem-solving, communication, and collaboration skills.
• Ability to work effectively in cross-functional teams and influence technical decisions across organizations.

Qualifications

• PhD or Master’s degree in Mechanical Engineering or Electrical Engineering.
• 5+ years of hands-on experience in semiconductor packaging development, package simulation, or packaging manufacturing.
• Strong understanding of IC packaging materials and their mechanical, thermal, and electrical behaviors.
• Strong knowledge of IC package structures, substrate technologies, and semiconductor assembly processes.
• Hands-on experience with major FEM tools; ANSYS experience is preferred.
• Experience with FloTHERM, Sigrity, or Icepak is a plus.
• Experience with Cadence Allegro is a plus.
• Strong analytical, problem-solving, communication, and collaboration skills.
• Ability to work effectively in cross-functional teams and influence technical decisions across organizations.

Benefits

• Medical, vision, and dental coverage.
• 401(k) plan.
• Paid vacation, holidays, and sick time.

Pay

The expected wage range for a new hire into this position is $113,190 to $163,905. Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

Schedule

This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.

Shift Type

1st Shift/Days