Staff Application Engineer- Physical Design

We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years in the trenches of physical design, where a bad placement decision at 5nm costs weeks and a routing congestion hotspot can kill a tapeout schedule. You know the difference between a flow that works on paper and one that actually closes timing at advanced nodes, and you have lived through enough iterations to spot the gap before it becomes a crisis. You are the engineer who gets called when a customer's design is stuck at 87% routing utilization or when their clock tree is burning 200mW more than it should, and you do not just debug the problem, you teach them how to think differently about their methodology. Working directly with customers energizes you. You like the puzzle of understanding their constraints, their schedule pressure, their process quirks, and then translating that into a concrete plan using Fusion Compiler or ICC2 that actually moves their design forward. You do not need a perfect runbook to be effective. You ask the right questions, reproduce the issue, and work the problem until it is solved or until you have a clear path to escalation. At Synopsys, you will be the technical bridge between our tools and the customers building the chips that power everything. The work is real, the problems are hard, and the impact is immediate. What You'll Be Doing Support customer engagements on Synopsys physical design tools including Fusion Compiler, ICC2, and Design Compiler, helping them achieve PPA targets on advanced node designsDebug complex physical design issues across the RTL-to-GDS flow, including placement, CTS, routing, timing closure, and power optimization at 7nm, 5nm, and belowDevelop and deliver methodology recommendations tailored to customer design constraints, process technologies, and project schedulesRun benchmarks and proof-of-concept flows to demonstrate tool capabilities, AI-driven optimization features, and advanced node methodologiesCollaborate with R&D, product management, and field teams to translate customer pain points into product requirements and feature requestsPresent technical content to customer engineering teams and management, translating tool capabilities into business outcomes like reduced cycle time or improved yieldTravel to customer sites as needed to provide onsite support, training, and design reviews The Impact You Will Have Accelerate customer tapeout schedules by weeks through targeted methodology improvements and tool optimization strategiesEnable successful adoption of Synopsys tools at key accounts, directly influencing design wins and renewalsShape product roadmaps by surfacing real-world customer challenges and advanced node requirements to engineering teamsBuild deep technical relationships with leading semiconductor companies, becoming their trusted advisor on physical design flowsReduce customer support escalations by proactively addressing methodology gaps and training engineering teams on best practicesContribute to the success of chips that will ship in millions of devices, from mobile processors to AI acceleratorsHelp customers unlock the full value of their Synopsys investment, improving their ROI and competitive positioning What You'll Need Bachelor's degree in Electrical Engineering or equivalent with 7+ years of hands-on ASIC physical design experience, or Master's degree with 5+ yearsDeep experience with RTL-to-GDS flows using industry-standard tools, including placement, optimization, clock tree synthesis, and routingStrong working knowledge of Synopsys backend tools, specifically Fusion Compiler or ICC2, with hands-on experience in timing closure, macro placement, and routing at advanced nodesProficiency with static timing analysis tools, particularly PrimeTime, including setup/hold analysis and noise analysisSolid understanding of advanced node design challenges at 7nm and below, including FinFET effects, multi-patterning, and electromigrationExperience with logical and physical synthesis flows and AI-driven methodologies for optimizationExcellent communication skills with the ability to present technical concepts clearly to both engineering teams and management Who You Are You can walk into a customer war room where timing is failing by 500ps at sign-off and quickly triage whether it is a methodology issue, a tool setting, or a fundamental design problemComfortable context-switching between multiple customer engagements, you manage priorities without dropping threads or losing technical depthYou explain complex tradeoffs like CTS topology choices or placement density targets in ways that make sense to a design lead who needs to make a decision todayCustomer-focused without being a pushover, you push back when a request does not align with best practices and offer a better path forwardYou document your work clearly enough that another engineer or the customer can pick up where you left off without a two-hour handoff callEnergized by teaching, you genuinely enjoy the moment when a customer engineer understands why their flow was suboptimal and how to fix it going forward The Team You'll Be Part Of You will join the Customer Success Group, the team responsible for ensuring customers get maximum value from Synopsys physical design tools. This is a technical applications role working directly with semiconductor companies on their most challenging designs. You will collaborate closely with field sales, R&D engineering, and product management teams across Synopsys to deliver customer success and drive product adoption. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.