Sr. Staff ASIC Design Verification Engineer
Rivian · Palo Alto, CA · 1 wk ago
On-siteEngineering$237k–$296k/yrFull-time
Role Summary
We are seeking a high-caliber Sr. Staff Design Verification Engineer to join our ADAS and Inference Silicon team. You will be responsible for the end-to-end functional verification of our next-generation SoC.
Responsibilities
- Drive end-to-end functional and performance verification of AI accelerator architectures: Ensure bit-accurate numerical integrity and high-bandwidth dataflow for production-scale CNN and Transformer workloads.
- Verification Methodology: Leverage SystemVerilog/UVM for Coverage-Driven Verification (CDV) to reach aggressive functional targets. Apply Formal Verification (SVA) to exhaustively prove corner cases in safety-critical arbiters, state machines, and concurrency logic where simulation falls short.
- Advanced Methodologies (nice-to-have): Strategize and Implement LLM-augmented workflows for Front End Development.
- Safety-Critical Verification (nice-to-have): Develop and execute verification plans compliant with ISO 26262 standards. Conduct Fault Injection Analysis (FIA) to verify safety mechanisms (ECC, Parity, BIST).
- Hardware-Software Co-Verification (nice-to-have): Collaborate with firmware teams using Emulation and FPGA prototyping to run full-stack software.
Qualifications
- Experience: Typically 10+ years of industry experience in ASIC design verification. Engineers who have seen multiple chips from "concept to tape-out."
- Education: BS/MS or PhD in Electrical Engineering or Computer Engineering.
- Hardware Knowledge:
- Deep understanding of Computer Architecture.
- Memory hierarchies (Cache, DMA, and DDR/HBM).
- Interconnect protocols (NoC - Network on Chip).
- Low-power design verification (UPF/CPF).
Bonus Skills / Experience
- Specialized hardware like Systolic Arrays, Vector Processors, or Neural Processing Units (NPUs).
- Understanding of how CNN and Transformer networks map to hardware.
- Compilers and toolchains
Pay
The salary range for this role is $237,000 - $296,000 for Palo Alto based applicants. The successful candidate may be eligible for annual performance bonus and equity awards.