Sr. Principal Technical Quality Engineer

About the role

Work with the Cadence global silicon solutions teams who are designing semiconductor IP for the top electronic product companies in the world, in leading edge semiconductor processes, using the latest industry tools and methodologies.

Responsibilities

• Actively participate on the global SSG Quality Team.
• Represent the SSG Quality Team to customers and partners.
• Work across the global organization to implement improvements to flows and procedures.
• Define and maintain quality procedures for multiple design teams.
• Improve effectiveness and efficiency of quality procedures through implementation of agentic AI systems.
• Generate, interpret, and communicate quality metrics.
• Perform Root-Cause-Analysis and identify Corrective Actions.
• Hold Post-Mortem reviews and summarize and communicate results.
• Aid design teams in preparation of Failure Analysis reports.
• Maintain quality certifications such ISO 9001 and ISO 26262.
• Support participation in external semiconductor foundry quality programs.

Requirements

• Education: MSEE
• Experience: 7+ years
• Hands-on experience in one or more areas of analog or digital IC design or verification, or experience in silicon fabrication quality assurance/control.
• Experience in analog IC design is a plus.
• Experience in defect management and defect analysis processes such as RCA, 5Why, 8D is a plus.
• Strong communication skills, quality consciousness, proactivity, and sense of responsibility.
• Strong problem analysis and teamwork skills.

Qualifications

Commensurate with experience.

Skills

Not specified.

Benefits

Not specified.

Pay

Annual salary range for California is $154,000 to $286,000.

Schedule

Not specified.