Sr. Principal Analog Design Engineer

We need to output HTML fragment with sections: About the role? Actually the posting includes "Introduction" and "Essential Responsibilities", "Other Responsibilities", "Required Qualifications", "Preferred Qualifications". Also "Expected Salary Range". Also maybe "Benefits"? Not present. So we need sections: About the role? The instruction: use

for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule). We should map content accordingly. We have: - Introduction: maybe "About the role" heading. Should contain description: "We are seeking an experienced Principal Analog Design Engineer to own and drive the architecture and design of high-performance analog/mixed-signal IP used across multiple SoCs. This role will focus on signal chain IP (ADCs, DACs, amplifiers, sensor interfaces) or power management IP (LDOs, DC-DCs, charge pumps, bandgaps)." Also maybe include GlobalFoundries description? The "About GlobalFoundries" is boilerplate? It's company overview; maybe we can include as part of About the role? But they said do not repeat job title as heading; we can include company description as part of About the role paragraph. - Responsibilities: combine Essential Responsibilities and Other Responsibilities into a list under

Responsibilities

. Use

• for each bullet. - Requirements/Qualifications: we have Required Qualifications and Preferred Qualifications. Could combine into Requirements section? Or separate? The instruction: prefer few substantive sections over many thin ones. Could have a single "Requirements" section containing both required and preferred, maybe with subheadings? But we cannot use headings other than h3? We could use

  Required Qualifications

  and

  Preferred Qualifications

  as separate sections if they have content. That's okay; they are substantive. But we need to avoid thin sections; each has multiple items. - Pay: we have Expected Salary Range. So we need a

  Pay

  with paragraph containing the salary range. - Benefits: not present, so omit. - Schedule: not present, omit. - Skills: maybe not separate; could be part of qualifications. We must preserve all substantive information, not invent or summarize away detail. Remove boilerplate: cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. The posting includes a lot of EEO statements at the end; we need to remove those. Also remove "GlobalFoundries is an equal opportunity employer..." etc. Also remove "All offers of employment..." etc. Also remove "If you need a reasonable accommodation..." maybe that's not boilerplate? It's accommodation request; could be considered part of application instructions? Might be considered boilerplate but it's about accommodation; maybe keep? The instruction says remove cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. The accommodation request is more like application instruction; could be removed. Safer to remove it. Also remove duplicated lines: there may be repeated sentences. We need to output only HTML fragment, no /, no markdown fences. Let's extract content. First, About GlobalFoundries paragraph: "GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com" We can include that as part of About the role. Introduction paragraph: "We are seeking an experienced Principal Analog Design Engineer to own and drive the architecture and design of high-performance analog/mixed-signal IP used across multiple SoCs. This role will focus on signal chain IP (ADCs, DACs, amplifiers, sensor interfaces) or power management IP (LDOs, DC-DCs, charge pumps, bandgaps)." Combine both into About the role. Now Responsibilities: list items from Essential Responsibilities and Other Responsibilities. Essential Responsibilities bullet points (some are long sentences). Let's parse: - Develop analog and mixed signal IP for products developed by MIPS covering industrial, automotive and other end-equipment. - Develop high performance analog and mixed signal IP covering signal chain IPs such as ADC (SAR, pipeline, delta-sigma), DACs, precision amplifiers, clocking, sensor interfaces or develop power management IP such as LDOs, DC-DC converters (buck-boost, buck, boost), bandgap references, charge pumps, power sequencing and monitoring circuits like POR, power good, power glitch etc. - Strong demonstrated design implementation ability to perform transistor-level design using advanced CMOS technology nodes. - Lead schematic design, simulation, and verification across PVT corners. - Strong understanding of analog design fundamentals and technology aspects. - Understanding and knowledge of design implementation for robustness covering process variation, mismatch, noise and reliability issues for advanced process nodes. - Cross-collaboration across disciplines working closely with digital, system, layout, and product teams. - Strong understanding of system level issues, noise, performance, area trade-offs, reliability considerations. - Provide technical leadership during architectural analysis. - Silicon Execution to support top-level integration, verification and tape-out. - Lead silicon bring-up, characterization and bring-up of the IPs designed. - Drive continuous improvements and lessons learnt for next-generation IP for re-use and scalability - Validation and Characterization skills on post-silicon. - Ability to define validation and characterization requirements. - Understanding spec compliance requirement needs and drive validation teams. - Define architecture to meet Design For Test (DFT) requirements and document bring-up, initialization procedures. - Drive design for test cost reductions where applicable - Technical leadership in providing technical guidance and mentorship to other junior engineers working in the team. - Establish best practices in analog design methodology and verification. - Influence roadmap planning for reusable analog IP platforms - Stay current with the latest trends in semiconductor design, drive design innovations, providing technical leadership and mentoring within the Hardware engineering team. - Participate in internal and external technical forums and lead next generation IP development Other Responsibilities: - Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs We'll combine. Now Required Qualifications: - Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field. - Minimum 16+ years of experience in analog mixed signal design in end-end design and delivery of complex analog IP blocks. - Proven expertise from concept to silicon is required. - Deep understanding of CMOS analog design fundamentals, noise analysis, stability and compensation, device mismatch and variation. - Experience and proven record of meeting power, performance and area requirements. - Strong understanding of low-power design techniques required - Strong knowledge and understanding of industry-standard EDA tools for design and simulation such as Cadence, Synopsys, Ansys etc. - Basic scripting and automation using PERL, Python and expertise in virtuoso and analog simulation environments - Strong analytical and debugging skills: Ability to identify, assess, and aid in debugging complex problems. - Proven silicon bring-up and debugging skills required. - Familiarity with lab equipment required - Excellent communication and documentation skills: Capable of producing clear, comprehensive requirements and architecture and design documentation for both internal and external usage - Collaborative mindset: Comfortable working in global, cross-disciplinary teams and engaging directly with different disciplines across design Preferred Qualifications: - Experience in ISO 26262/IEC 61508: Experience in applying the standard throughout the development lifecycle, especially at the semiconductor IP and SoC level - Strong understanding of analog layout techniques - Driving innovation and participation in industry level technical events, publishing papers/patents is highly preferrable Pay: Expected Salary Range $171,000.00 - $296,000.00 The exact Salary will be determined based on qualifications, experience and location. We'll put that in Pay section. Now we need to ensure we don't include boilerplate like "GlobalFoundries is an equal opportunity employer..." etc. Remove all that. Also remove duplicated lines: I see some repeated phrases like "Strong understanding of analog design fundamentals and technology aspects." appears maybe twice? Actually appears in Essential Responsibilities and also maybe elsewhere? We'll keep only one instance? The instruction: preserve ALL substantive information; do NOT invent or summarize away detail. If there are duplicates, we should keep them? It says remove duplicated lines. So we should deduplicate identical lines. We'll need to check for duplicates. Let's list responsibilities lines and see duplicates. I'll write them out: 1. Develop analog and mixed signal IP for products developed by MIPS covering industrial, automotive and other end-equipment. 2. Develop high performance analog and mixed signal IP covering signal chain IPs such as ADC (SAR, pipeline, delta-sigma), DACs, precision amplifiers, clocking, sensor interfaces or develop power management IP such as LDOs, DC-DC converters (buck-boost, buck, boost), bandgap references, charge pumps, power sequencing and monitoring circuits like POR, power good, power glitch etc. 3. Strong demonstrated design implementation ability to perform transistor-level design using advanced CMOS technology nodes. 4. Lead schematic design, simulation, and verification across PVT corners. 5. Strong understanding of analog design fundamentals and technology aspects. 6. Understanding and knowledge of design implementation for robustness covering process variation, mismatch, noise and reliability issues for advanced process nodes. 7. Cross-collaboration across disciplines working closely with digital, system, layout, and product teams. 8. Strong understanding of system level issues, noise, performance, area trade-offs, reliability considerations. 9. Provide technical leadership during architectural analysis. 10. Silicon Execution to support top-level integration, verification and tape-out. 11. Lead silicon bring-up, characterization and bring-up of the IPs designed. 12. Drive continuous improvements and lessons learnt for next-generation IP for re-use and scalability 13. Validation and Characterization skills on post-silicon. 14. Ability to define validation and characterization requirements. 15. Understanding spec compliance requirement needs and drive validation teams. 16. Define architecture to meet Design For Test (DFT) requirements and document bring-up, initialization procedures. 17. Drive design for test cost reductions where applicable 18. Technical leadership in providing technical guidance and mentorship to other junior engineers working in the team. 19. Establish best practices in analog design methodology and verification. 20. Influence roadmap planning for reusable analog IP platforms 21. Stay current with the latest trends in semiconductor design, drive design innovations, providing technical leadership and mentoring within the Hardware engineering team. 22. Participate in internal and external technical forums and lead next generation IP development 23. Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs Check duplicates: none identical. Now Required Qualifications list: 1. Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related field. 2. Minimum 16+ years of experience in analog mixed signal design in end-end design and delivery of complex analog IP blocks. 3. Proven expertise from concept to silicon is required. 4. Deep understanding of CMOS analog design fundamentals, noise analysis, stability and compensation, device mismatch and variation. 5. Experience and proven record of meeting power, performance and area requirements. 6. Strong understanding of low-power design techniques required 7. Strong knowledge and understanding of industry-standard EDA tools for design and simulation such as Cadence, Synopsys, Ansys etc. 8. Basic scripting and automation using PERL, Python and expertise in virtuoso and analog simulation environments 9. Strong analytical and debugging skills: Ability to identify, assess, and aid in debugging complex problems. 10. Proven silicon bring-up and debugging skills required. 11. Familiarity with lab equipment required 12. Excellent communication and documentation skills: Capable of producing clear, comprehensive requirements and architecture and design documentation for both internal and external usage 13. Collaborative mindset: Comfortable working in global, cross-dis