Principal Analog Design Engineer
About the role
... paragraph from Job Description ...
Then Responsibilities: list items. Then Qualifications: list items. We need to preserve all substantive information; do not invent or summarize away detail. So we need to copy the text exactly as given, but we can format intoor
for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule)." It says e.g., implying those are examples but we should stick to those. It also says "include a section ONLY when the posting has real, specific content for it". So we could create a section "About the role" and put both the role description and company description? That might mix. Better to keep About the role as the role description only, and omit company description because no appropriate heading. The instruction says preserve ALL substantive information; but if we omit company description, we lose some substantive info. However maybe that's considered boilerplate? It's not exactly boilerplate but it's generic company info. The instruction to remove cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. This is not those. But we have no heading for it; maybe we could put it in a
without heading? The instruction says output ONLY the HTML fragment; we can have
elements not under headings? It didn't forbid stray paragraphs. It said use
for section headings, - for any list,
for prose. So we can have prose paragraphs outside headings. So we could add a
for company description after the role description. That would preserve info without violating heading rule. Let's do that.
Thus structure:
About the role
Job description paragraph.
Company description paragraph(s).
Responsibilities
...
Qualifications
...
We must not repeat job title as heading. Already not.
We must not put Job ID/requisition numbers as headings; none present.
We must not create Benefits/Pay/Schedule sections because not specific.
Now ensure we preserve all substantive information from the posting: we have role description, responsibilities, qualifications, company description (including purpose, team size, TAGIE culture, benefits statement, export controls note?). Wait there is also export controls note at end: "Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas." That's also substantive info; should we include? It's legal/export control notice. The instruction says remove cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate. This is legal export control notice; could be considered legal boilerplate. Likely should be removed. It's a legal statement. So we omit.
Also there is EEO statement: "Renesas Electronics is an equal opportunity and affirmative action employer..." That's EEO boilerplate; remove.
Also Diversity & Inclusion Statement reference; remove.
Thus we keep company description up to "More information will be provided during the hiring process." That's the benefits vague line. Also the sentence about TAGIE culture etc. That's substantive.
Let's capture company description block:
"Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process."
We'll put that in a (maybe multiple sentences but one paragraph). Ensure we keep hyphens and special characters.
Now produce HTML.
We need to ensure proper escaping? Not needed.
Let's craft:
About the role
We are seeking a Principal Analog Design Engineer to serve as a global technical authority and lead the architectural evolution of our PMIC and mixed-signal product lines. This high-impact role spans the entire development lifecycle—from early-stage customer collaboration and specification to final silicon verification and production readiness. We are looking for a seasoned expert with over 12 years of experience who can balance technical mastery with strategic mentorship, driving both engineering excellence and company-wide methodology improvements. If you are ready to influence product roadmaps and lead multicultural teams in a collaborative, innovation-first environment, we invite you to help us design the sustainable solutions of tomorrow.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Responsibilities
- Lead the full development lifecycle of major analog and mixed-signal blocks and top-level PMIC products, from initial specification through design, simulation, and silicon verification.
- Act as a global technical authority and primary point of contact, providing sound architectural recommendations and mentoring engineers to ensure excellence across the design team.
- Collaborate directly with customers to define system requirements and develop innovative solutions that meet performance, area, and power constraints.
- Oversee high-level verification planning, DFT strategy, and lab evaluation in partnership with applications and test engineering teams to ensure designs are production-ready.
- Drive the identification and implementation of company-wide improvements in engineering methodologies, policies, and strategic initiatives.
- Support roadmap planning and ensure technical advice is aligned with external market trends and evolving CMOS process technologies.
Qualifications
- Minimum of 12 to 15 years experience in power management with a proven record of acting as a technical project lead on complex ICs within the last four years.
- Degree level qualification in Electronics Engineering or a related discipline
for prose. So we can have prose paragraphs outside headings. So we could add a
for company description after the role description. That would preserve info without violating heading rule. Let's do that. Thus structure:
About the role
Job description paragraph.
Company description paragraph(s).
Responsibilities
- ...
Qualifications
- ...
(maybe multiple sentences but one paragraph). Ensure we keep hyphens and special characters. Now produce HTML. We need to ensure proper escaping? Not needed. Let's craft:
About the role
We are seeking a Principal Analog Design Engineer to serve as a global technical authority and lead the architectural evolution of our PMIC and mixed-signal product lines. This high-impact role spans the entire development lifecycle—from early-stage customer collaboration and specification to final silicon verification and production readiness. We are looking for a seasoned expert with over 12 years of experience who can balance technical mastery with strategic mentorship, driving both engineering excellence and company-wide methodology improvements. If you are ready to influence product roadmaps and lead multicultural teams in a collaborative, innovation-first environment, we invite you to help us design the sustainable solutions of tomorrow.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Responsibilities
- Lead the full development lifecycle of major analog and mixed-signal blocks and top-level PMIC products, from initial specification through design, simulation, and silicon verification.
- Act as a global technical authority and primary point of contact, providing sound architectural recommendations and mentoring engineers to ensure excellence across the design team.
- Collaborate directly with customers to define system requirements and develop innovative solutions that meet performance, area, and power constraints.
- Oversee high-level verification planning, DFT strategy, and lab evaluation in partnership with applications and test engineering teams to ensure designs are production-ready.
- Drive the identification and implementation of company-wide improvements in engineering methodologies, policies, and strategic initiatives.
- Support roadmap planning and ensure technical advice is aligned with external market trends and evolving CMOS process technologies.
Qualifications
- Minimum of 12 to 15 years experience in power management with a proven record of acting as a technical project lead on complex ICs within the last four years.
- Degree level qualification in Electronics Engineering or a related discipline