Sr Performance Validation Engineer
Amazon Lab126 · Sunnyvale, CA · 1 wk ago
EngineeringFull-time
Key job responsibilities
- Design and execute comprehensive validation strategies for silicon performance during the pre-silicon phase using RTL simulations, emulation platforms, and virtual prototypes.
- Develop test plans that verify performance against design specifications before tape-out.
- Create and maintain validation infrastructure including test benches, performance models, simulation environments, and automated validation frameworks.
- Create methodologies for accurate performance prediction and correlation with expected post-silicon results.
- Identify performance bottlenecks through simulation and analysis, working with design teams to implement optimization strategies before tape-out.
- Debug and Root Cause Analysis
- Create comprehensive checklists and procedures for performance validation activities.
- Work closely with architecture, RTL design, verification and emulation teams to ensure performance requirements are met throughout the pre-silicon development cycle.
- Provide early feedback to design teams on performance optimization opportunities.
- Collaborate with external partners and vendors on emulation and virtual platform activities.
Basic Qualifications
- 7+ years of UVM, C, System C, and scripting experience
- Deep understanding of digital design principles, timing analysis, and power management techniques
- Expertise in pre-silicon performance validation methodologies for complex SoCs or processors using simulation, emulation, and virtual platforms
- Bachelor’s degree in electrical engineering, Computer Engineering, or related field with 7+ years of experience
- Proficiency with industry-standard tools including RTL simulators (VCS, Questa, Xcelium), emulation platforms (Palladium, Zebu), and performance analysis tools
- Strong programming skills in Python, C/C++, SystemVerilog, or similar languages for test automation and performance modeling
- Strong knowledge of semiconductor design flows from architecture to tape-out and their impact on performance
Preferred Qualifications
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- Proven track record of successful pre-silicon performance validation on multiple tape-outs
- Understanding of performance modeling techniques and correlation methodologies
- Familiarity with industry standards and protocols relevant to the target application domain
- Experience with machine learning accelerators, multi-core processors, or similar complex digital designs is a plus
- Experience with emulation-based validation of multi-core processors or SoCs
- Knowledge of UPF (Unified Power Format) and low-power design techniques, performance modeling and early power estimation methodologies
- Experience with virtual prototyping and transaction-level modeling (TLM)
- Retail design experience is beneficial