Sr. Hardware Engineer - ML Acceleration, Annapurna Labs
About the Role
As a senior member of our hardware team within the Machine Learning Acceleration team, you will have the outstanding and meaningful opportunity to participate in the design and execution of all PCIe and Serdes topics, with the goal of creating customized platforms that fit within AWS datacenter's world leading technology. You'll be responsible for the design and optimization of hardware in our data centers, providing leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position where you'll work with thought leaders in multiple technology areas.
Key Responsibilities
- Participate in the definition, design and validation of AWS next generation ML Chips, Cards and server integration
- Drive design and execution of all PCIe and Serdes topics
- Provide leadership in the application of new technologies to large scale server deployments
- Constantly look for ways to improve product performance, quality and cost
- Work with ODMs, IP Silicon vendors, component suppliers and internal design teams on cross-boundary triaging, debugging, and resolving issues
Basic Qualifications
- Deep knowledge with PCIe interface Gen4 or above, both Electrical and Functional at the chip level and at the PCB level
- Deep understanding of Transmission line theory and Electromagnetics and its application in SerDes, Single-ended signal and parallel bus interfaces
- Hands-on lab equipment skills (VNA, Realtime scope, Sampling scope and its accessories) for electrical validation and characterization
- Scripting skills to automate tests, logs parsing and data collection
- Strong technical communication skills (verbal and written) to interface with cross-functional technical leads within and/or outside of the organization
Preferred Qualifications
- Experience with Server HW designs, Design validation, Production tests and signal integrity of high speed interfaces
- Knowledge of the product development cycle from concept to mass production
- Strong analytical capabilities
- The ability to work independently and drive tasks from start to completion
- Ability to work cross functionally with SW team to define and implement diagnostics for hardware validation at component, interface, and system level
- Experience with server (x86 / ARM) design or architecture
Pay
The base pay for this position ranges from $143,300/year in our lowest geographic market up to $247,600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits.