Jobs · Engineering · California

Sr. FPGA Engineer

Rocket Lab · Pasadena, CA · 5 days ago
On-siteEngineeringFull-time

About the role

The Senior Firmware Engineer I/II will participate in the development and test of avionics hardware for our robotics programs. They will work collaboratively with engineers of various disciplines and participate in all aspects of electrical hardware development, from requirements definition through design, prototyping, fabrication, testing, and production. The position offers opportunities to test and operate systems on-orbit.

Responsibilities

  • End to end ownership of IP and algorithms for robotics and motor control applications
  • Work with an interdisciplinary team on requirements and documentation
  • Complete FPGA logic design, coding, simulation, and testing
  • Perform synthesis, implementation, and timing analysis
  • Debugging of hardware in the lab with the use of logic analyzers and oscilloscopes
  • Support hardware and software development teams with verification and validation
  • Develop FPGA test firmware and support automated test equipment (ATE) for production
  • Provide subject-matter expertise regarding debug, design, and automated test development
  • Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility

Requirements

  • Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 5+ years of experience for level I or 8+ years of experience for level II
  • 5+ years of experience in FPGA firmware design with Verilog, specifically creating IP from scratch
  • Able to develop "blank sheet of paper" design concepts
  • Experience in motor control applications
  • Experience in analog signal chains including an FPGA
  • Experience in digital signal processing
  • Proficiency in FPGA verification and validation
  • Experience with software interfaces, interrupts, and DMA
  • Familiarity with AXI Memory Mapped interfaces

Qualifications

  • For Senior Firmware Engineer I:
  • Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 5+ years of experience for level I or 8+ years of experience for level II
  • 5+ years of experience in FPGA firmware design with Verilog, specifically creating IP from scratch
  • Able to develop "blank sheet of paper" design concepts
  • Experience in motor control applications
  • Experience in analog signal chains including an FPGA
  • Experience in digital signal processing
  • Proficiency in FPGA verification and validation
  • Experience with software interfaces, interrupts, and DMA
  • Familiarity with AXI Memory Mapped interfaces
  • For Senior Firmware Engineer II:
  • Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience for level I or 8+ years of experience for level II
  • 5+ years of experience in FPGA firmware design with Verilog, specifically creating IP from scratch
  • Able to develop "blank sheet of paper" design concepts
  • Experience in motor control applications
  • Experience in analog signal chains including an FPGA
  • Experience in digital signal processing
  • Proficiency in FPGA verification and validation
  • Experience with software interfaces, interrupts, and DMA
  • Familiarity with AXI Memory Mapped interfaces

Skills

  • Experience implementing real-time control, signal processing, data acquisition, machine vision, or sensor-interface algorithms in FPGA fabric
  • Experience with Field-Oriented-Control
  • Experience with FPGAs and embedded systems in a radiation environment including SEU/SEL impact and mitigation
  • Experience with board bring-up and debug utilizing logic analyzers, oscilloscopes, etc.
  • Experience in FPGA with single precision floating point math
  • PCB design and schematic capture and layout with tools such as Altium Designer
  • Experience with Librero
  • Modeling systems such as Simulink
  • Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL

Benefits

Includes competitive compensation, comprehensive benefits package, and opportunities for professional growth within a dynamic and innovative environment.

Pay

Competitive salary commensurate with experience and qualifications.

Schedule

Full-time, Monday through Friday, with occasional evening and weekend work as needed.

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