Sr Advanced FPGA Firmware Developer

Requirements

Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or Master's degree plus a minimum of 6 years of relevant experience.

Department of Defense Secret security clearance obtainable within reasonable time based on requirements. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Responsibilities

At General Dynamics Mission Systems (GDMS), you will work with amazing engineers inventing technologies, products, and services that help service members, intelligence analysts, and first responders keep our nation safe. GDMS provides premium systems, services, and products for the Department of Defense, government agencies, and commercial clients, leading in technology insertion, acoustic sensors, signal processing, combat systems, torpedoes, cyber security, knowledge management, and electronic warfare.

The Sr. Advanced FPGA Firmware Developer will develop, integrate, test, and support custom FPGA firmware within the Torpedo Systems Group (TSG). The TSG designs, develops, demonstrates, produces, assembles, tests, and delivers torpedo SONAR arrays and electronic assemblies, working with the Navy, internal production staff, and representatives from other companies to advance torpedo performance and lower production costs.

• Architect, design, and document FPGA firmware hierarchies, components, interfaces, and data flows
• Develop, simulate, and test firmware components in preparation for hardware integration
• Define FPGA timing, pinout, and placement constraints; review synthesis and timing reports and address issues
• Integrate and test firmware on target hardware using FPGA tools and laboratory equipment
• Document failures, identify root causes, implement fixes, verify changes, and maintain configuration management documentation
• Identify opportunities to apply AI for continuous improvement and innovation

Skills

We encourage you to apply if you have any of these skills or experiences:

• Experience implementing FPGA firmware including custom VHDL components containing state machines, synchronous/asynchronous logic, processes, and external interfaces
• Understanding of the underlying FPGA fabric and experience working across cross-clock boundaries
• Familiarity with Xilinx (AMD) and/or Altera (Intel) compiler, programming, and debug tools
• Experience reviewing schematics, parts lists, and rework documentation
• Methodical, independent problem-solving and research skills

What sets you apart:

• Deep knowledge of FPGA fabric architecture and advanced cross-clock domain design techniques
• Hands-on experience with Xilinx (AMD) and Altera (Intel) toolchains for synthesis, implementation, and debug
• Proven ability to read and interpret schematics and guide hardware rework to support firmware design
• Track record of independently diagnosing and resolving complex integration issues
• Experience maintaining rigorous configuration management practices in a structured engineering environment

Benefits

• Exciting career path with opportunities for continuous learning and development
• Research-oriented work alongside award-winning teams developing practical solutions for national security
• Flexible schedules with every other Friday off (9/80 schedule), if desired
• Competitive benefits including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups, and more

See more at gdmissionsystems.com/careers/why-work-for-us/benefits

Schedule

This position is ON-SITE in Canonsburg, PA. A hybrid work schedule may be available in the future, but will require a minimum of 3 days per week on-site. Relocation package/assistance may be available. Learn more about Canonsburg at gdmissionsystems.com/about-us/major-locations/charleroi-canonsburg

Pay

Target salary range: USD $150,000.00/Yr. - USD $160,000.00/Yr. This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary.

About the company

General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products, and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment, and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded.