Sr. Advanced FPGA Firmware Developer

Department of Defense Secret security clearance obtainable within a reasonable time after hire; U.S. citizenship required.

Qualifications

• Bachelor's degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 8 years of relevant experience; or
• Master's degree plus a minimum of 6 years of relevant experience.

Responsibilities

As a Sr. Advanced FPGA Firmware Developer in the Torpedo Systems Group (TSG), you will:

• Architect, design, and document FPGA firmware hierarchies, components, interfaces, and data flows.
• Develop, simulate, and test firmware components in preparation for hardware integration.
• Define FPGA timing, pinout, and placement constraints; review synthesis and timing reports and address issues.
• Integrate and test firmware on target hardware using FPGA tools and laboratory equipment.
• Document failures, identify root causes, implement fixes, verify changes, and maintain configuration management documentation.
• Identify opportunities to apply AI for continuous improvement and innovation.

We encourage you to apply if you have any of these skills or experiences:

• Experience implementing FPGA firmware including custom VHDL components containing state machines, synchronous/asynchronous logic, processes, and external interfaces.
• Understanding of the underlying FPGA fabric and experience working across cross-clock boundaries.
• Familiarity with Xilinx (AMD) and/or Altera (Intel) compiler, programming, and debug tools.
• Experience reviewing schematics, parts lists, and rework documentation.
• Methodical, independent problem-solving and research skills.

Skills

What sets you apart:

• Deep knowledge of FPGA fabric architecture and advanced cross-clock domain design techniques.
• Hands-on experience with Xilinx (AMD) and Altera (Intel) toolchains for synthesis, implementation, and debug.
• Proven ability to read and interpret schematics and guide hardware rework to support firmware design.
• Track record of independently diagnosing and resolving complex integration issues.
• Experience maintaining rigorous configuration management practices in a structured engineering environment.

Benefits

• Competitive benefits, including 401k matching, flex time off, paid parental leave, healthcare benefits, health & wellness programs, employee resource and social groups.
• Flexible schedules with every other Friday off work (9/80 schedule).
• An exciting career path with opportunities for continuous learning and development.
• Research-oriented work alongside award-winning teams developing practical solutions for national security.

Pay

Target salary range: USD $150,000.00/Yr. - USD $160,000.00/Yr.

Schedule

This position is on-site in Canonsburg, PA. A hybrid work schedule may be available in the future, requiring a minimum of 3 days per week on-site. Relocation assistance may be available.