SoC Verification Engineer

We need to output HTML fragment with sections: headings

for sections like About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. Only include sections that have real specific content. We must not repeat job title as heading. No Job ID etc. Remove boilerplate like EEO, etc. Keep substantive info. We need to parse the job description. Sections present: - About the role: The Role and Impact paragraph, Business Group paragraph maybe part of About the role. - Responsibilities: Key Responsibilities list. - Qualifications: Minimum Qualifications and Preferred Qualifications. - Skills: maybe not explicit; but we could include "Expected Professional Traits" as Skills? The instruction says use headings like Skills if content exists. There's "Expected Professional Traits" which are soft skills. Could treat as Skills. - Benefits: Benefits paragraph. - Pay: Annual Salary Range. - Schedule: Work Model (hybrid) maybe schedule? Also Shift info: Shift 1 (United States of America). Could include Schedule. We need to include only sections with real content. We must not include placeholder like "commensurate with experience". Not present. We need to preserve all substantive info. We need to use

• for any list of duties/requirements/benefits. We need to use

  for prose. We need to output only HTML fragment, no /, no markdown fences. Let's craft. First, maybe a short paragraph for metadata? The instruction: "Do NOT put Job ID / requisition numbers as headings — fold minor metadata into a short

  or drop it." There's no Job ID shown. There's "Job Type Experienced Hire Shift Shift 1 (United States of America)". Could be considered minor metadata; we could include in a

  maybe. But we can also drop it. However we need to preserve ALL substantive information; shift info maybe considered substantive? It's about work schedule. Could go under Schedule section. Let's decide sections: - About the role (combining Role and Impact + Business Group) - Responsibilities - Qualifications (minimum and preferred) - Skills (Expected Professional Traits) - Benefits - Pay - Schedule (Work Model + Shift) We need to ensure we don't create sections with filler. Now extract content. About the role: Paragraph 1: "The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's complex System-on-Chip (SoC) designs meet functional specifications and deliver high-quality performance. You will design scalable and reusable verification plans, develop test environments, and execute tests to uncover issues and improve functionality. Your contributions will directly enhance Intel's product quality and ensure optimal performance in presilicon development." Paragraph 2: "Business Group You will be joining Intel's cutting-edge product development group, a team focused on designing and verifying advanced semiconductor solutions. This group is at the forefront of innovation, delivering high-quality, scalable products that drive Intel's leadership in technology and performance. By contributing your skills here, you will help shape the future of computing and enable groundbreaking advancements in the industry." We can combine into one

  maybe two paragraphs. Responsibilities: list items from "Key Responsibilities". Let's extract each bullet: - Define and develop scalable and reusable block, subsystem, and SoC verification plans. - Create test benches and verification environments that align with microarchitecture specifications. - Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs. - Debug and root cause issues in presilicon environments, implementing corrective measures to address failures. - Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features. - Document and maintain test plans, driving technical reviews with design and architecture teams. - Integrate security coverage activities within test plans, including regression and debug tests. - Maintain and improve existing functional verification infrastructure and methodologies. - Absorb learnings from postsilicon development and incorporate feedback into improved verification strategies. We'll put each as

• . Qualifications: Minimum Qualifications and Preferred Qualifications. Minimum Qualifications text: "Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning. OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 2+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning. OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field." Preferred Qualifications: "Familiarity with emulation models and system simulation tools for performance analysis. AI tools to perform verification Experience with postsilicon validation and incorporating feedback into presilicon test plans" Note there is a missing period maybe but keep as is. We could format as
  • for each qualification? The instruction: use
    • for any list of duties/requirements/benefits. Qualifications could be considered requirements; we can list each bullet. But the qualifications are not naturally bullet list; we could split into items: Bachelor's..., Master's..., PhD... as separate
    • . Preferred: Familiarity..., AI tools..., Experience... We'll do that. Skills: Expected Professional Traits: "Passion for tackling complex problems and delivering innovative solutions. Strong communication skills and ability to work collaboratively across interdisciplinary teams. Experience with postsilicon validation and incorporating feedback into presilicon test plans." We can make
      • each. Benefits: paragraph: "We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel." We'll put as

        . Pay: "Annual Salary Range for jobs which could be performed in the US: $141,910.00 - 200,340.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process." We'll put as

        . Schedule: Work Model: "Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change." Shift info: "Job Type Experienced Hire Shift Shift 1 (United States of America)". Could combine. We'll make a

        with that info. We must not include boilerplate like EEO, Position of Trust N/A, Additional Information about RBA, etc. Remove those. Now produce HTML. Structure:

        About the role

        ... maybe two

        but we can combine into one

        with sentences. Better to separate paragraphs: two

        . But instruction: use

        for prose. So multiple

        okay. Let's do:

        About the role

        The Role and Impact As a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's complex System-on-Chip (SoC) designs meet functional specifications and deliver high-quality performance. You will design scalable and reusable verification plans, develop test environments, and execute tests to uncover issues and improve functionality. Your contributions will directly enhance Intel's product quality and ensure optimal performance in presilicon development.

        Business Group You will be joining Intel's cutting-edge product development group, a team focused on designing and verifying advanced semiconductor solutions. This group is at the forefront of innovation, delivering high-quality, scalable products that drive Intel's leadership in technology and performance. By contributing your skills here, you will help shape the future of computing and enable groundbreaking advancements in the industry.

        Then Responsibilities:

        Responsibilities

        • Define and develop scalable and reusable block, subsystem, and SoC verification plans.
        • Create test benches and verification environments that align with microarchitecture specifications.
        • Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs.
        • Debug and root cause issues in presilicon environments, implementing corrective measures to address failures.
        • Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features.
        • Document and maintain test plans, driving technical reviews with design and architecture teams.
        • Integrate security coverage activities within test plans, including regression and debug tests.
        • Maintain and improve existing functional verification infrastructure and methodologies.
        • Absorb learnings from postsilicon development and incorporate feedback into improved verification strategies.
        Qualifications:

        Qualifications

        • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 3+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning.
        • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 2+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning.
        • PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
        • Familiarity with emulation models and system simulation tools for performance analysis.
        • AI tools to perform verification
        • Experience with postsilicon validation and incorporating feedback into presilicon test plans
        But note that Preferred Qualifications separate; we could separate headings Minimum and Preferred but instruction says prefer few substantive sections over many thin ones. Could combine all qualifications into one section. That's fine. Skills:

        Skills

        • Passion for tackling complex problems and delivering innovative solutions.
        • Strong communication skills and ability to work collaboratively across interdisciplinary teams.
        • Experience with postsilicon validation and incorporating feedback into presilicon test plans.
        Benefits:

        Benefits

        We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

        Pay:

        Pay

        Annual Salary Range for jobs which could be performed in the US: $141,910.00 - 200,340.00 USD. The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

        Schedule:

        Schedule

        Work Model for this Role: This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. Job posting details (such as work model, location or time type) are subject to change. Shift: Experienced Hire, Shift 1 (United States of America).

        We need to ensure we didn't include any boilerplate like EEO etc. We omitted. Check for any leftover: "Position of Trust N/A" omitted. "Additional Information: Intel is committed to Responsible Business Alliance (RBA) compliance..." omitted. Good. Now output only HTML fragment.