SoC Limits Management Lead

About the role

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Responsibilities

• Define the SoC limits management by integrating hardware triggers, firmware policies, and software mitigations to protect silicon health.
• Lead cross-functional teams to standardize critical mitigation features, including Power Telemetry, Estimators, and Droop Detectors, across all IP and hardware blocks.
• Drive the long-term evolution of Sensing IPs (Voltage, Current, Temperature) and trigger mechanisms to address escalating current densities and industry trends.
• Design real-time telemetry requirements to monitor silicon behavior and define performance-impact profiles for various mitigation strategies.
• Drive organizational consensus on feature return on investment (ROI) and oversee Post-Silicon Validation to ensure physical silicon behavior aligns with architectural intent.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
• 15 years of industry experience in Power Management or Low-Power Design/Methodology.
• Experience navigating the full product delivery cycle, from initial architecture definition through to post-silicon productization.
• Experience with low-power architectures and advanced power optimization techniques.

Qualifications

• MS or PhD in Electronics or Computer Engineering, or equivalent, with a focus on computer architecture and power/performance analysis.

Skills

• Exceptional leadership and influencing skills, with an ability to influence cross-functional roadmaps and drive ROI-based technical decisions.

Pay

US: $240,000 - $334,000 (USD) + 25% bonus target + equity + benefits