Signal Integrity / Power Integrity (SI/PI) Engineer

Location: San Jose / Irvine, California, USA – Onsite – Long-Term Contract

About the role

We are seeking an experienced Signal Integrity / Power Integrity (SI/PI) Engineer to support the development and validation of next-generation high-speed interfaces. The role involves signal and power integrity analysis for advanced semiconductor platforms using technologies such as LPDDR5X, PCIe Gen7, and UCIe.

The ideal candidate will have strong expertise in SI/PI simulations, channel analysis, PDN modeling, and cross-functional collaboration with IC, package, and PCB design teams.

Responsibilities

• Perform signal integrity analysis for high-speed digital interfaces.
• Execute channel modeling, extraction, and eye diagram analysis.
• Conduct pre-layout and post-layout SI simulations.
• Analyze crosstalk, reflections, jitter, insertion loss, and return loss.
• Perform power integrity extraction and simulation for high-speed interfaces.
• Model and optimize package and PCB Power Distribution Networks (PDN).
• Define and validate decoupling capacitor strategies based on system requirements.
• Collaborate with IC design, package design, and PCB engineering teams to optimize overall SI/PI performance.
• Develop simulation methodologies and validation workflows for advanced interfaces.
• Generate technical reports and simulation summaries to support design reviews.
• Provide SI/PI design recommendations and layout guidelines.
• Ensure compliance with industry interface specifications and signal quality requirements.

Qualifications

• BE / B.Tech / ME / M.Tech in Electronics & Communication Engineering (ECE), Electrical & Electronics Engineering (EEE), or related discipline.
• 5+ years of experience in Signal Integrity and Power Integrity engineering.
• Strong understanding of high-speed digital interface design.
• Experience working with semiconductor package and PCB design teams.
• Excellent analytical, debugging, and communication skills.
• Ability to work effectively within cross-functional engineering teams.

Skills

High-Speed Interfaces

• LPDDR5 / LPDDR5X
• LPDDR6 (preferred)
• PCI Express (PCIe Gen5/6/7)
• UCIe
• DDR Memory Interfaces

Signal Integrity

• Channel Modeling
• Channel Extraction
• Eye Diagram Analysis
• Crosstalk Analysis
• Reflection Analysis
• Jitter Analysis
• Insertion Loss
• Return Loss
• Transmission Line Analysis

Power Integrity

• Power Integrity Simulation
• PDN Modeling
• PDN Analysis
• Decoupling Strategy
• IR Drop Fundamentals
• Package PDN
• Board PDN

Simulation & EDA Tools

• Ansys HFSS
• SIwave
• Ansys AEDT
• Clarity
• Cadence PowerSI
• HSPICE
• Equivalent SI/PI Simulation Tools

Industry Standards

• JEDEC
• LPDDR5
• LPDDR5X
• LPDDR6
• PCI Express Standards
• UCIe Specifications