Senior Staff Engineer, Firmware Engineering

Marvell’s semiconductor solutions power data infrastructure across enterprise, cloud, AI, and carrier architectures. The Firmware team builds embedded firmware for high-speed optical components, including Silicon photonics, transmit/receive amplifiers, and controller ASICs with Marvell DSPs.

About the role

As a Sr. Staff Software Engineer, you’ll work closely with software, hardware, and test teams—as well as systems, customer support, and operations experts—to drive successful product launches. Core areas include:

• Embedded firmware for RISC-V-based multi-core MCUs controlling proprietary DSP data paths
• C SDK for customer interfacing and product control
• Python-based GUI for in-field debug, status, and control
• Build, test, and automated regression infrastructure for the above

Responsibilities

• Design, implement, test, deploy, and maintain firmware for embedded systems, both independently and cross-functionally
• Serve as the software expert on a block or portion of the design, owning SW architecture, development, and testing of embedded C firmware end-to-end
• Collaborate with HW and SW teams on system requirements, schematics, and hardware validation
• Lead bring-ups for next-generation Marvell products and travel to worldwide offices for chip bring-up (~3 weeks/yr; Ottawa, California, Italy, Vietnam)
• Lead difficult debug efforts, drive to root causes with HW/Systems teams, and follow through with test, validation, and customer support
• Optimize firmware for performance, reliability, and power consumption
• Participate in and lead design reviews, code reviews, and debugging sessions
• Plan SW milestones, develop in sprints, close tickets, and roll out features across multiple test disciplines
• Execute frequent firmware releases for both internal use and external customers
• Develop and maintain documentation including functional specs, design documents, test specifications, user guides, and examples
• Stay current with industry trends and emerging technologies

Example tasks:

• Mentor interns or new hires
• Develop Python test scripts to configure, control, and gather status from DSP hardware platforms
• Optimize subroutines for multi-core MCU efficiency
• Design and implement unit testing for firmware
• Collaborate on code reviews, test analysis, and complex customer issue debugging
• Implement temperature-tracking algorithms for DSP/analog control

Requirements

• BS/MS in Computer Science, Electrical/Software Engineering, or related field; BS with 5+ years or MS with 2–3 years in memory-constrained embedded C/C++ firmware development
• Experience with technical ownership on embedded projects: task management, release planning, architecture, design, development, code reviews, testing, and delivery through customer volume production
• Experience with microprocessor architectures (ARM or RISC-V; RISC-V a plus)
• Understanding of embedded SoC/micro-controller architecture, memory-mapped hardware interfaces, GPIOs, ISRs, RTOS, queuing, memory management, and interrupt processing
• Embedded device driver experience in communications protocols (e.g., SPI, I2C, MDIO, UART)
• Experience writing control firmware for: CDR, Flash/EEPROM, Laser Driver, TEC Controller
• Understanding of parameter calibration techniques (e.g., interpolation, splines)
• Expert C and Python programming skills; working knowledge of git, Linux, makefiles, gdb, IDEs, bash, etc.
• Hands-on debug skills using oscilloscopes, logic analyzers, JTAG, and other embedded diagnostics tooling
• Working knowledge of hardware design schematics
• Excellent verbal and written communication skills in English; ability to collaborate across a large, remotely located cross-functional organization
• Excellent multitasking skills

Preferred Qualifications

• Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module SW
• Experience designing, developing, and debugging software state machines, transitions, context saving, and error handling
• Experience with mixed-signal (analog+digital) control and monitoring, PID/feedback loop control, etc.
• Experience with bare-metal, device drivers, or Linux kernel development
• Familiarity with advanced compiler options (clang/gcc preferred)
• Familiarity with digital verification test flows, FPGA emulation, and hardware languages such as Verilog
• Familiarity with lab equipment such as power supplies, PNAs, ONTs, etc.
• Understanding of Ethernet networking from the OSI model, with emphasis on the PHY up to the data link level
• Familiarity with forward error correction, PCS framing, PMA/PMD, PRBS, and other PHY traffic schemes
• Understanding of signal processing: histograms, BER, SNR, sampling phase, Shannon limit, impulse & frequency response, FFT, etc.

Pay

Expected base pay range: $131,010 – $196,300 per year. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions.

Benefits

• Employee stock purchase plan with a 2-year look back
• Family support programs to help balance work and home life
• Robust mental health resources to prioritize emotional well-being
• Recognition and service awards to celebrate contributions and milestones