Senior SoC Network Subsystem Architect
About the role
The CEG NAG (Networking Architecture Group) is Intel's premier team focused on defining the future of high-performance networking silicon. Our team architects next-generation networking solutions that enable hyperscale data centers, cloud infrastructure, and AI workloads to achieve unprecedented performance and efficiency. We specialize in IPU/DPU platforms, advanced packet processing architectures, and programmable networking technologies that form the backbone of modern distributed computing systems.
Responsibilities
Own end-to-end NSS architecture, including packet processing pipelines, protocol engines, and interface datapaths
Architect high-performance packet pipelines supporting hundreds of millions of packets/sec throughput and processing flows
Drive architectural direction for programmable vs. fixed-function pipeline balance and future extensibility
Specify network subsystem pipeline scaling strategies and define multi-generation NSS architecture roadmap
Lead design decisions for pipeline partitioning, feature scalability, and backward compatibility
QoS, Scheduling, and Flow Management: Architect advanced scheduling frameworks (per-flow shaping, multi-level scheduling, traffic class isolation)
Define QoS models to support multi-tenant workloads, virtualization, and service chaining
Debug, Telemetry, and Observability: Define architecture for telemetry, performance counters, and real-time observability of pipeline behavior
Architecture support for field debug, failure triage, and large-scale deployment monitoring
Cross-Functional Leadership: Collaborate across SoC, compute, memory, SW/FW, validation, and customer teams to drive architecture closure
Interface with external customers to translate workload requirements into NSS architecture decisions
Lead architectural reviews and influence cross-team technical direction
Qualifications
Bachelor’s degree in Electrical/Computer Engineering, Computer Science or related degree with 7 + years of experience.
You must have 7+ years of experience in the following:
- Networking ASIC / SoC / IPU / DPU architecture
- High-speed packet processing pipelines
- Experience in system-level architecture tradeoffs
- Define and deliver architecture for large-scale data center networking systems
Experience with programmable datapath architectures (P4, pipeline microcode, or hybrid models)
Experience with AI/HPC scale-out networking and congestion control architectures
Transport protocols offloads
QoS, scheduling, and multi-tenant isolation
Familiarity with coherent or shared-memory offload models (e.g., CPU-IPU integration)
Experience with hyperscaler deployments or customer co-design engagements