Senior SoC Design Verification Engineer

About the role

Lead verification efforts for complex system-on-chip (SoC) designs enabling Intel's next generation of client computing and AI technologies. Drive verification strategy, architecture, methodology development, and execution across block, subsystem, and SoC-level verification environments. Collaborate with architects, RTL designers, security engineers, and validation teams to ensure industry-leading quality, functionality, security, and performance of Intel silicon products.

Responsibilities

• Perform functional logic verification of integrated SoCs to ensure designs meet specifications.
• Define and develop scalable, reusable block, subsystem, and SoC verification plans, test benches, and verification environments.
• Execute verification plans using emulation and system simulation models to analyze power, performance, and functionality.
• Identify, replicate, root cause, and debug issues in the pre-silicon environment, implementing corrective measures to resolve failing tests.
• Collaborate with SoC architects, microarchitects, RTL developers, post-silicon teams, and physical design teams to enhance verification methodologies.
• Develop and execute security-focused test plans to ensure security coverage during regression and debug testing.
• Maintain and improve existing functional verification infrastructure and methodologies for future products.
• Incorporate learning from post-silicon validation to identify gaps and update test plans to improve coverage for subsequent projects.
• Document test plans and conduct technical reviews with design and architecture teams.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 8+ years of experience in SoC verification, including test planning, implementation, and debug.
• Experience with System Verilog, OVM or UVM methodologies, and SoC test environment/VC development.
• Debugging and root cause analysis in pre-silicon environments.
• Experience with hardware simulation tools and methodologies.
• System architecture, SoC architecture, and microarchitecture concepts.
• Experience with low-power design and verification techniques.
• Experience with Python and scripting for automation of verification tasks.
• Experience with Design for Test (DFT) tools and techniques.