Senior Silicon Emulation Engineer
About the role
The Silicon Emulation Engineer supports the development and validation of AI accelerator and AI-centric SoCs using hardware emulation platforms. This role is critical to enabling early bring-up, software validation, and performance analysis of neural network accelerators prior to silicon availability.
Responsibilities
- Develop and maintain emulation platforms for AI accelerator / AI-centric SoCs
- Integrate large-scale RTL (compute, DMA, memory subsystems, interconnects) into emulation environments
- Enable early firmware, driver, runtime, and ML stack bring-up on emulated hardware
- Support execution of AI inference workloads (e.g., CNNs, transformers) on emulated Mythic accelerators
- Collaborate with compiler, runtime, and ML teams to debug HW/SW co-design issues
- Develop scripts and automation for emulation builds, regressions, and workload execution
- Analyze performance, bandwidth utilization, latency, and throughput of AI workloads in emulation
- Debug complex issues spanning RTL, firmware, drivers, and user-space ML frameworks
- Support post-silicon correlation and performance validation when applicable
- Document emulation flows, performance methodologies, and debug procedures
Requirements
Bachelor’s, Master's, or Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Strong understanding of SoC architectures and AI accelerator design concepts
Experience with RTL simulation and emulation (Verilog/SystemVerilog)
Familiarity with hardware emulation platforms (e.g. Cadence Palladium)
Experience working in Linux-based environments
Proficiency in scripting (Python, Tcl, Bash)
Strong debugging skills across hardware and software layers
Qualifications
Nice to have:
- Experience with NPU, DSP, or GPU-class accelerators
- Experience running or debugging ML inference workloads on pre-silicon platforms
- Knowledge of AI software stacks (runtime, compiler, graph execution)
- Familiarity with DMA engines, memory hierarchies, and high-bandwidth interconnects
- Understanding of AXI/AMBA protocols and cache coherency
- Experience with FPGA prototyping or hybrid emulation flows
- Exposure to performance modeling or architectural trade-off analysis
Skills
Experience with hardware emulation platforms (e.g. Cadence Palladium)
Proficiency in scripting (Python, Tcl, Bash)
Strong debugging skills across hardware and software layers
Benefits
$120,000 - $225,000 a year
Actual compensation depends on experience, skills, qualifications, and location