Senior Signal and Power Integrity Engineer - Hardware

About the Role

NVIDIA is seeking a Senior Signal & Power Integrity Engineer to join a dynamic team working with state-of-the-art technology. This role involves tackling complex system design challenges and contributing to innovations that amplify human imagination and intelligence.

Responsibilities

• Develop creative Signal Integrity solutions for complex system design problems.
• Model and optimize vias, connectors, sockets, breakouts, and various system components using 3D EM tools.
• Perform system-level signal integrity simulations for high-speed interfaces such as NVLink (200Gbps+), USB-4, PCIe5, GDDR6, and LP5X.
• Improve SI models using lab measurements or updates to modeling tools/methodologies.
• Create, review, and extract post-layout SI guidelines for substrate and board layouts.
• Automate simulations, data gathering, analysis, and visualization using tools like JMP, MATLAB, or similar.
• Collaborate in a cross-functional role to optimize package, PCB, ASIC, and mixed-signal circuits.

Requirements

• BS/MS in Electrical Engineering or equivalent experience with 6+ years in the industry.
• Strong technical background in applied electromagnetics, transmission line theory, and signal processing.
• Experience with SI work on signaling standards such as PCIe, USB, SATA, HDMI, HBM, DDR5, GDDR6, or LPDDR5X.
• Hands-on experience with 3D modeling tools (ANSYS HFSS/Q3D), 2.5D tools (ANSYS SIWAVE), and 2D tools (Ansys2D).
• Familiarity with system-level timing or loss budgets, including silicon, package, and board impairments.
• Experience with lab tools such as VNA, TDR, DSO, ParBERT, and applications like ADS, Ansys Designer, JMP, MATLAB, or Cadence Allegro is a plus.

Skills That Stand Out

• Experience designing interconnect electromagnetic models for 200Gbps systems, particularly in backplane and midplane architectures.
• Hands-on expertise in characterizing and correlating high-speed connectors and cable assemblies in the lab (including VNA usage).
• Strong understanding of stamping, plating, and molding processes to collaborate with mechanical and industrial engineers on design trade-offs.
• Knowledge of characterizing new LCP materials to develop accurate electrical component libraries.
• Ability to conduct statistical analysis of connectors, cables, and cable assemblies to assess performance at production sites.
• Proficiency in analyzing connector product specifications, including mechanical, environmental, electrical, and SI testing requirements.
• Knowledge of circuit design, board/package technology, link architecture, and timing budget methodologies.

Pay

The base salary range is $168,000–$264,500 USD for Level 4 and $196,000–$310,500 USD for Level 5, depending on location, experience, and comparable roles. Eligible for equity and benefits.