Signal and Power Integrity Engineer - Hardware

About the role

This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle!

Responsibilities

• Work on crafting creative Signal Integrity solutions to complex system design problems.
• Modeling and Optimization of vias, connectors, sockets, breakouts and various system components in 3D EM tools.
• System-level signal integrity simulations of high-speed NVlink 200Gbs+, USB-4, PCIe5, GDDR6, LP5X and other interfaces.
• Constant improvements of SI models using data from lab measurements and/or modelling tool/methodology updates.
• Substrate and board layout SI guidelines creation, review and post layout SI extractions.
• Simulation automation, data gathering, analysis and visualization using JMP, MATLAB or similar tools.
• Opportunity to work in a dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit.

Requirements

• BS/MS-Electrical Engineering or equivalent experience with minimum 2+ years of industry experience.
• Strong technical background in applied electromagnetics, transmission line theory and signal processing will be highly valued.
• SI work on one or more signaling standards like PCI express, USB, SATA, HDMI, HBM, DDR5, GDDR6, LPDDR5X, etc.
• Hands on use of 3-D modeling tools like ANSYS HFSS/Q3D, 2.5-D with ANSYS SIWAVE or similar and 2D such as Ansys2D.
• Familiarity with a system level timing or loss budget including silicon, package and board impairments.
• Background with use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro will be a plus.

Qualifications

• Experience in SI simulation and verification of test sockets, LGA sockets and mezzanine connectors, and designing channels which include them.
• Expertise in one or more of the high speed interface SI/PI design on any industry standard system platforms.
• Experience with lab measurements, debugging, SI lab correlation using oscilloscope/ spectrum analyzer/ VNA.
• Knowledge of circuit design, board/pkg technology & design, link architecture, timing budget methodologies.
• Familiarity with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations.

Skills

• Strong technical background in applied electromagnetics, transmission line theory and signal processing.
• Hands on use of 3-D modeling tools like ANSYS HFSS/Q3D, 2.5-D with ANSYS SIWAVE or similar and 2D such as Ansys2D.
• Familiarity with a system level timing or loss budget including silicon, package and board impairments.
• Use of VNA, TDR, DSO, ParBERT and use of tools/applications like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro.
• Experience with lab measurements, debugging, SI lab correlation using oscilloscope/ spectrum analyzer/ VNA.
• Knowledge of circuit design, board/pkg technology & design, link architecture, timing budget methodologies.
• Familiarity with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations.

Benefits

Base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3. You will also be eligible for equity and benefits.

Pay

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.

Schedule

NVIDIA does not specify the schedule for this position.